SNAS636C December   2013  – July 2021

PRODUCTION DATA

1. Features
2. Applications
3. Description
4. Revision History
5. Pin Configuration and Functions
6. Specifications
7. Parameter Measurement Information
8. Detailed Description
1. 8.1 Overview
2. 8.2 Functional Block Diagram
3. 8.3 Feature Description
4. 8.4 Device Functional Modes
9. Power Supply Recommendations
1. 9.1 Current Consumption and Power Dissipation Calculations
2. 9.2 Power Supply Bypassing
10. 10Layout
11. 11Device and Documentation Support

• RTA|40
• RTA|40

### 9.1.1 Power Dissipation Example: Worst-Case Dissipation

This example shows how to calculate IC power dissipation for a configuration to estimate worst-case power dissipation. In this case, the maximum supply voltage and supply current values specified in Section 6.5 are used.

• VCC = VCCO = 3.465 V. Maximum ICC and ICCO values.
• CLKin0/CLKin0* input is selected.
• Banks A and B are enabled: all outputs terminated with 50 Ω to GND.
• REFout is enabled with 5-pF load.
• TA = 85°C

Using the power calculations from the previous section and maximum supply current specifications, we can compute PTOTAL and PDEVICE.

• From Equation 5: ICC_TOTAL = 10.5 mA + 38.5 mA + 38.5 mA + 5.5 mA = 93 mA
• From ICCO_HCSL maximum spec: ICCO_BANK_A = ICCO_BANK_B = 84 mA
• From Equation 7: PTOTAL = 3.465 V × (93 mA + 84 mA + 84 mA + 10 mA) = 939 mW
• From Equation 8: PRT_HCSL = (0.92 V) 2 / 50 Ω = 16.9 mW (per output pair)
• From Equation 9: PDEVICE = 939 mW – (8 × 16.9 mW) = 803.8 mW

In this worst-case example, the IC device will dissipate about 803.8 mW or 85.6 of the total power (939 mW), while the remaining 14.4% will be dissipated in the termination resistors (135.2 mW for 8 pairs). Based on θJA of 31.4°C/W, the estimated die junction temperature would be about 25.2°C above ambient, or 110.2°C when TA = 85°C.