SNAS791D December   2019  – February 2022 LMK1C1102 , LMK1C1103 , LMK1C1104

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Fail-Safe Inputs
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Receiving Notification of Documentation Updates
    2. 13.2 Support Resources
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10.2.3 Application Curves

The low additive jitter of the LMK1C110x is shown in Figure 10-2.

Figure 10-3 shows the low-noise 156.25-MHz reference source with 25.6-fs RMS jitter driving the LMK1C110x, resulting in 26.7-fs RMS jitter when integrated from 12 kHz to 20 MHz at 3.3-V supply. The resultant additive jitter measured is a low 7.6-fs RMS for this configuration.

Figure 10-4 shows the low-noise 156.25-MHz reference source with 25.6-fs RMS jitter driving the LMK1C110x, resulting in 27.5-fs RMS jitter when integrated from 12 kHz to 20 MHz at 2.5-V supply. The resultant additive jitter measured is a low 10-fs RMS for this configuration.

Figure 10-5 shows the low-noise 156.25-MHz reference source with 25.6-fs RMS jitter driving the LMK1C110x, resulting in 32-fs RMS jitter when integrated from 12 kHz to 20 MHz at 1.8-V supply. The resultant additive jitter measured is a low 19.2-fs RMS for this configuration.

GUID-1DBFED88-DCC8-4C25-9E75-4AA1F2130FF1-low.pngFigure 10-2 LMK1C110x Reference Phase Noise 25.6-fs (12 kHz to 20 MHz)
GUID-24E91EA4-CE88-4BE6-BE18-0FDAABC6A00C-low.pngFigure 10-4 LMK1C110x 2.5-V Output Phase Noise 27.5-fs (12 kHz to 20 MHz)
GUID-B27FEC68-795A-4BE3-9A49-7C26B45163AE-low.pngFigure 10-3 LMK1C110x 3.3-V Output Phase Noise 26.7-fs (12 kHz to 20 MHz)
GUID-046C9E6A-A4E7-4588-9444-B2A7405E6633-low.pngFigure 10-5 LMK1C110x 1.8-V Output Phase Noise 32-fs (12 kHz to 20 MHz)