SNAS722A December 2017 – October 2018 LMK61E07
The PLL in LMK61E07 is made of LC VCO that is designed using high-Q monolithic inductors to oscillate between 4.6 GHz and 5.6 GHz and has low phase noise characteristics. The VCO must be calibrated to ensure that the clock outputs deliver optimal phase noise performance. Fundamentally, a VCO calibration establishes an optimal operating point within the tuning range of the VCO. Setting R72 to 1 causes a VCO recalibration and is necessary after device reconfiguration. VCO calibration automatically occurs on device power up.