SNAS826
April 2022
LMK6C
ADVANCE INFORMATION
1
Features
2
Applications
3
Description
4
Revision History
5
Device Comparison
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
LMK6P/D Thermal Information
7.5
LMK6C Thermal Information
7.6
Electrical Characteristics
7.7
Timing Diagrams
8
Parameter Measurement Information
8.1
Device Output Configurations
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.3
Feature Description
9.3.1
Bulk Acoustic Wave (BAW)
9.3.2
Device Block-Level Description
9.3.3
Function Pin(s)
9.3.4
Clock Output Interfacing and Termination
9.3.5
Temperature Stability
9.3.6
Mechanical Robustness
9.4
Device Functional Modes
10
Application and Implementation
10.1
Application Information
10.2
Typical Application
10.2.1
Design Requirements
11
Power Supply Recommendations
12
Layout
12.1
Layout Guidelines
12.1.1
Ensuring Thermal Reliability
12.1.2
Best Practices for Signal Integrity
12.1.3
Recommended Solder Reflow Profile
12.2
Layout Examples
13
Device and Documentation Support
13.1
Documentation Support
13.1.1
Related Documentation
13.2
Device Nomenclature
13.3
Receiving Notification of Documentation Updates
13.4
Support Resources
13.5
Trademarks
13.6
Electrostatic Discharge Caution
13.7
Glossary
14
Mechanical, Packaging, and Orderable Information
14.1
Packaging Information
14.2
Tape and Reel Information
Package Options
Mechanical Data (Package|Pins)
DLF|4
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snas826_oa
7.2
ESD Ratings
VALUE
UNIT
V
(ESD)
Electrostatic discharge
Human body model (HBM),
per ANSI/ESDA/JEDEC JS-001
(1)
(3)
±2000
V
Charged device model (CDM),
per ANSI/ESDA/JEDEC JS-002
(2)
(3)
±500
(1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2)
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
(3)
For Industrial Grade device