SNVSAH3E February   2018  – July 2020 LMR23625

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fixed-Frequency Peak-Current-Mode Control
      2. 7.3.2 Adjustable Output Voltage
      3. 7.3.3 Enable/Sync
      4. 7.3.4 VCC, UVLO
      5. 7.3.5 Minimum ON-time, Minimum OFF-time and Frequency Foldback at Drop-out Conditions
      6. 7.3.6 Internal Compensation and CFF
      7. 7.3.7 Bootstrap Voltage (BOOT)
      8. 7.3.8 Overcurrent and Short-Circuit Protection
      9. 7.3.9 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Active Mode
      3. 7.4.3 CCM Mode
      4. 7.4.4 Light Load Operation (PFM Option)
      5. 7.4.5 Light Load Operation (FPWM Option)
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Custom Design With WEBENCH® Tools
        2. 8.2.2.2  Output Voltage Setpoint
        3. 8.2.2.3  Switching Frequency
        4. 8.2.2.4  Inductor Selection
        5. 8.2.2.5  Output Capacitor Selection
        6. 8.2.2.6  Feed-forward Capacitor
        7. 8.2.2.7  Input Capacitor Selection
        8. 8.2.2.8  Bootstrap Capacitor Selection
        9. 8.2.2.9  VCC Capacitor Selection
        10. 8.2.2.10 Undervoltage Lockout Set-Point
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Compact Layout for EMI Reduction
    4. 10.4 Ground Plane and Thermal Considerations
    5. 10.5 Feedback Resistors
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Custom Design With WEBENCH® Tools
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DDA|8
  • DRR|12
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

Limits apply over the recommended operating junction temperature (TJ) range of –40°C to +125°C, unless otherwise stated. Minimum and Maximum limits are specified through test, design or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only.
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
POWER SUPPLY (VIN PIN)
VINOperation input voltage436V
VIN_UVLOUndervoltage lockout thresholdsRising threshold3.33.73.9V
V
Falling threshold2.93.33.5
ISHDNShutdown supply currentVEN = 0 V, VIN = 12 V, TJ = –40°C to 125°C24μA
IQOperating quiescent current (non- switching)VIN =12 V, VFB = 1.1 V, TJ = –40°C to 125°C, PFM mode75μA
ENABLE (EN/SYNC PIN)
VEN_HEnable rising threshold Voltage1.41.551.7V
VEN_HYSEnable hysteresis voltage0.4V
VWAKEWake-up threshold0.4V
IENInput leakage current at EN pinVIN = 4 V to 36 V, VEN= 2 V10100nA
VIN = 4 V to 36 V, VEN = 36 V1μA
VOLTAGE REFERENCE (FB PIN)
VREFReference voltageVIN = 4 V to 36 V, TJ = 25°C0.98511.015V
VIN = 4 V to 36 V, TJ =–40°C to 125°C0.9811.02
ILKG_FBInput leakage current at FB pinVFB = 1 V10nA
POWER GOOD (PGOOD PIN)
VPG_OVPower-good flag overvoltage tripping threshold% of reference voltage104%107%110%
VPG_UVPower-good flag undervoltage tripping threshold% of reference voltage92%94%96.5%
VPG_HYSPower-good flag recovery hysteresis% of reference voltage1.5%
VIN_PG_MINMinimum VIN for valid PGOOD output1.5
VPG_LOWPGOOD low level output voltage0.4
0.4
INTERNAL LDO (VCC PIN)
VCCInternal LDO output voltage4.1V
VCC_UVLOVCC undervoltage lockout thresholdsRising threshold2.83.23.6V
Falling threshold2.42.83.2
CURRENT LIMIT
IHS_LIMITPeak inductor current limitHSOIC package3.64.86.2A
WSON package4.05.56.6
ILS_LIMITValley inductor current limitHSOIC package2.83.54.6A
WSON package2.93.64.2
IL_ZCZero cross current limitHSOIC and WSON packages–0.04A
IL_NEGNegative current limit (FPWM Option)HSOIC and WSON packages–2.7–2–1.3A
INTEGRATED MOSFETS
RDS_ON_HSHigh-side MOSFET ON-resistanceHSOIC package, VIN = 12 V, IOUT = 1 A185mΩ
WSON package, VIN = 12 V, IOUT = 1 A160
RDS_ON_LSLow-side MOSFET ON-resistanceHSOIC package, VIN = 12 V, IOUT = 1 A105mΩ
WSON package, VIN = 12 V, IOUT = 1 A95
THERMAL SHUTDOWN
TSHDNThermal shutdown threshold162170178°C
THYSHysteresis15°C