SLVSBM9E October   2013  – September 2018 LMZ31520

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
    1.     Efficiency
  3. 3 Description
    1.     Simplified Application
  4. 4 Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 Recommended Operating Conditions
    3. 4.3 Thermal Information
    4. 4.4 Package Specifications
    5. 4.5 Electrical Characteristics
  5. 5 Device Information
    1.     Pin Functions
    2. 5.1 Functional Block Diagram
  6. 6 Typical Characteristics (PVIN = VIN = 12 V)
  7. 7 Typical Characteristics (PVIN = VIN = 5 V)
  8. 8 Application Information
    1. 8.1  Adjusting the Output Voltage
    2. 8.2  Frequency Select
    3. 8.3  Capacitor Recommendations for the LMZ31520 Power Supply
      1. 8.3.1 Capacitor Technologies
        1. 8.3.1.1 Electrolytic, Polymer-Electrolytic Capacitors
        2. 8.3.1.2 Ceramic Capacitors
        3. 8.3.1.3 Tantalum, Polymer-Tantalum Capacitors
        4. 8.3.1.4 Input Capacitor
        5. 8.3.1.5 Output Capacitor
    4. 8.4  Transient Response
    5. 8.5  Application Curves Device configured for FCCM mode of operation, (pin 3 connected to pin 19).
    6. 8.6  Application Schematics
    7. 8.7  Custom Design With WEBENCH® Tools
    8. 8.8  VIN and PVIN Input Voltage
    9. 8.9  3.3 V PVIN Operation
    10. 8.10 Power Good (PWRGD)
    11. 8.11 Slow Start (SS_SEL)
    12. 8.12 Auto-Skip Eco-mode / Forced Continuous Conduction Mode
    13. 8.13 Power-Up Characteristics
    14. 8.14 Pre-Biased Start-Up
    15. 8.15 Remote Sense
    16. 8.16 Output On/Off Inhibit (INH)
    17. 8.17 Overcurrent Protection
    18. 8.18 Current Limit (ILIM) Adjust
    19. 8.19 Thermal Shutdown
    20. 8.20 Layout Considerations
    21. 8.21 EMI
  9. 9 Revision History
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Development Support
        1. 10.1.1.1 Custom Design With WEBENCH® Tools
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Community Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  11. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RLG|72
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.10 Power Good (PWRGD)

The PWRGD pin is an open drain output. Once the voltage on the SENSE+ pin is between 90% and 115% of the set voltage, the PWRGD pin pull-down is released and the pin floats. The recommended pull-up resistor value is between 10 kΩ and 100 kΩ to a voltage source that is less than 7 V. An internal 100 kΩ pull-up resistor is provided internal to the device between the PWRGD pin (pin 19) and PWRGD_PU pin (pin 18). The PWRGD_PU pin can be connected to a voltage source less than 7 V or connected directly to V5V (pin 61), which is an internal 5V regulator. The PWRGD pin is in a defined state once VIN is greater than 1.0 V. The PWRGD pin is pulled low when the voltage on SENSE+ is lower than 90% or greater than 115% of the nominal set voltage. Also, the PWRGD pin is pulled low if the input UVLO or thermal shutdown is asserted or the INH pin is pulled low.