SLVS522R july   2004  – july 2023 LP2985 , LP2985A

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Output Enable
      2. 7.3.2 Dropout Voltage
      3. 7.3.3 Current Limit
      4. 7.3.4 Undervoltage Lockout (UVLO)
      5. 7.3.5 Output Pulldown
      6. 7.3.6 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device Functional Mode Comparison
      2. 7.4.2 Normal Operation
      3. 7.4.3 Dropout Operation
      4. 7.4.4 Disabled
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Recommended Capacitor Types
      2. 8.1.2 Input and Output Capacitor Requirements
      3. 8.1.3 Noise Bypass Capacitor (CBYPASS)
      4. 8.1.4 Reverse Current
      5. 8.1.5 Power Dissipation (PD)
      6. 8.1.6 Estimating Junction Temperature
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 ON/OFF Operation
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Nomenclature
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Application Curves

at operating temperature TJ = 25°C, VIN = VOUT(NOM) + 1.0 V or 2.5 V (whichever is greater), IOUT = 1 mA, ON/OFF pin tied to VIN, CIN = 1.0 µF, and COUT = 4.7 µF (unless otherwise noted)

GUID-7B40B05F-60C4-4EBD-9A56-56EC901D61A2-low.gif
 
Figure 8-3 Load Transient Response for Legacy Chip
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Figure 8-5 Load Transient Response for Legacy Chip
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Figure 8-7 Load Transient Response for Legacy Chip
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Figure 8-9 Line Transient Response for Legacy Chip
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Figure 8-11 Line Transient Response for Legacy Chip
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Figure 8-13 Line Transient Response for Legacy Chip
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Figure 8-15 Line Transient Response for Legacy Chip
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Figure 8-17 Turn-On Time for Legacy Chip
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Figure 8-19 Turn-On Time for Legacy Chip
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COUT = 4.7 μF
Figure 8-21 Turn-On Time for Legacy Chip
GUID-AB4C1ADA-7AD4-4BB3-B5BC-12209B061895-low.gif
COUT = 4.7 μF
Figure 8-23 Turn-On Time
GUID-20221126-SS0I-LWJ4-CC98-B1T3GBMKLXSQ-low.svg
dI/dt = 1 A/μ
Figure 8-4 Load Transient Response for New Chip
GUID-20221126-SS0I-PPZV-NW7C-SGGWWSGDJTP2-low.svg
dI/dt = 1 A/μ
Figure 8-6 Load Transient for New Chip
GUID-20221126-SS0I-PGX3-VDK2-JDS81DGVQSHL-low.svg
dI/dt = 1 A/μ
Figure 8-8 Load Transient Response for New Chip
GUID-20221126-SS0I-X6LZ-F68H-KDXJXLHGHFR9-low.svg
VOUT = 3.3 V, CBYP = 0 nF, ΔVIN = 1 V, IOUT = 150 mA, dV/dt = 1 V/μ
Figure 8-10 Line Transient Response for New Chip
GUID-20221126-SS0I-CKRZ-Q7BN-NWRN7D5HQ3KB-low.svg
VOUT = 3.3 V, CBYP = 10 nF, ΔVIN = 1 V, IOUT = 150 mA, dV/dt = 1 V/μ
Figure 8-12 Line Transient Response for New Chip
GUID-20221126-SS0I-VKGW-HPKF-2JMGSFFL2BMF-low.svg
VOUT = 3.3 V, CBYP = 0 nF, ΔVIN = 1 V, IOUT = 1 mA, dV/dt = 1 V/μ
Figure 8-14 Line Transient Response for New Chip
GUID-20221126-SS0I-4J52-XFK7-FN2J26RS6MBG-low.svg
VOUT = 3.3 V, CBYP = 10 nF, ΔVIN = 1 V, IOUT = 1 mA, dV/dt = 1 V/μ
Figure 8-16 Line Transient Response for New Chip
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Figure 8-18 Turn-On Time for New Chip
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Figure 8-20 Turn-On Time for New Chip
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COUT = 4.7 μF
Figure 8-22 Turn-On Time for New Chip
GUID-20221126-SS0I-BH1V-8JFF-W8G5ZZCPMNLD-low.svg
COUT = 4.7 μF
Figure 8-24 Turn-On Time for New Chip