SNVS171J November   2001  – January 2017 LP2992

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Sleep Mode
      2. 7.3.2 Low Ground Current
      3. 7.3.3 Low Noise
      4. 7.3.4 Enhanced Stability
      5. 7.3.5 Overcurrent Protection
      6. 7.3.6 Overtemperature Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation with VOUT(TARGET) + 0.9 V ≥ VIN ≥ 16 V
      2. 7.4.2 Operation with ON/OFF Control
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 External Capacitors
          1. 8.2.2.1.1 Input Capacitor
          2. 8.2.2.1.2 Output Capacitor
          3. 8.2.2.1.3 Noise Bypass Capacitor
        2. 8.2.2.2 Capacitor Characteristics
          1. 8.2.2.2.1 Tantalum
        3. 8.2.2.3 Reverse Input-Output Voltage
        4. 8.2.2.4 Power Dissipation
        5. 8.2.2.5 Estimating Junction Temperature
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
    3. 10.3 WSON Mounting
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)
MIN MAX UNIT
Lead temperature (soldering, 5 seconds) 260 °C
Power dissipation(3) Internally Limited
Input supply voltage (survival) −0.3 16 V
Shutdown input voltage (survival) −0.3 16 V
Output voltage (survival)(4) −0.3 9 V
IOUT (survival) Short-circuit protected
Input-output voltage (survival)(5) −0.3 16 V
Storage temperature, Tstg −65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) If Military- or Aerospace-specified devices are required, contact the Texas Instruments Sales Office/Distributors for availability and specifications.
(3) The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal resistance, RθJA, and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperature is calculated using:
P(MAX) = (TJ(MAX) – TA) / RθJA
Where the value of RθJA for the SOT-23 package is 169.7°C/W in a typical PC board mounting and the WSON package is 72.3°C/W. Exceeding the maximum allowable dissipation causes excessive die temperature, and the regulator goes into thermal shutdown.
(4) If used in a dual-supply system where the regulator load is returned to a negative supply, the LP2992 output must be diode-clamped to ground.
(5) The output PNP structure contains a diode between the IN to OUT pins that is normally reverse-biased. Reversing the polarity from VIN to VOUT turns on this diode.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) Pins 3 and 4 (SOT)
Pins 1 and 3 (WSON)		 ±1000 V
All pins except 3 and 4 (SOT)
All pins except 1 and 3 (WSON)		 ±2000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VIN Input supply voltage 2.2(1) 16 V
VON/OFF ON/OFF input voltage 0 VIN V
IOUT Output current 250 mA
TJ Operating junction temperature –40 125 °C
(1) Recommended minimum VIN is the greater of 2.2 V or VOUT + rated dropout voltage (maximum) for operating load current.

6.4 Thermal Information

THERMAL METRIC(1) LP2992 UNIT
DBV (SOT-23) NGD (WSON)(3)
5 PINS 6 PINS
RθJA(2) Junction-to-ambient thermal resistance 169.7 72.3 °C/W
RθJC(top) Junction-to-case (top) thermal resistance, High K 122.6 81.6 °C/W
RθJB Junction-to-board thermal resistance 29.9 39.5 °C/W
ψJT Junction-to-top characterization parameter 16.7 2.0 °C/W
ψJB Junction-to-board characterization parameter 29.4 39.2 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance n/a 11.6 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics.
(2) Thermal resistance value RθJA is based on the EIA/JEDEC High-K printed circuit board defined by: JESD51-7 - High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages.
(3) The PCB for the NGD (WSON) package RθJA includes two (2) thermal vias under the exposed thermal pad per EIA/JEDEC JESD51-5.

6.5 Electrical Characteristics

Unless otherwise specified: VIN = VOUT(NOM) + 1 V, IL = 1 mA, CIN = 1 µF, COUT = 4.7 µF, VON/OFF = 2 V. MIN (minimum) and MAX (maximum) limits apply over the recommended operating temperature range unless otherwise noted; typical limits apply for TA = TJ = 25°C.
PARAMETER TEST CONDITIONS TYP LP2992AI-X.X(1) LP2992I-X.X(1) UNIT
MIN MAX MIN MAX
ΔVOUT Output voltage tolerance IL = 1 mA, TJ = 25°C −1 1 −1.5 1.5 %VNOM
1 mA ≤ IL ≤ 50 mA, TJ = 25°C −1.5 1.5 −2.5 2.5
1 mA ≤ IL ≤ 50 mA −2.5 2.5 −3.5 3.5
1 mA ≤ IL ≤ 250 mA, TJ = 25°C −3.5 3.5 −4 4
1 mA ≤ IL ≤ 250 mA −4.5 4.5 −5 5
ΔVOUT/ΔVIN Output voltage line regulation VOUT(NOM) + 1 V ≤ VIN ≤ 16 V
TJ = 25°C		 0.007 0.014 0.014 %/V
VOUT(NOM) + 1 V ≤ VIN ≤ 16 V 0.032 0.032
VIN(min) Minimum input voltage required to maintain output regulation 2.05 2.2 2.2 V
VIN – VOUT Dropout voltage(2) IL = 0 mA, TJ = 25°C 0.5 2.5 2.5 mV
IL = 0 mA 4 4
IL = 1 mA, TJ = 25°C 5 9 9
IL = 1 mA 12 12
IL = 50 mA, TJ = 25°C 100 125 125
IL = 50 mA 180 180
IL = 150 mA, TJ = 25°C 260 325 325
IL = 150 mA 470 470
IL = 250 mA, TJ = 25°C 450 575 575
IL = 250 mA 850 850
IGND Ground pin current IL = 0 mA, TJ = 25°C 65 95 95 µA
IL = 0 mA 125 125
IL = 1 mA, TJ = 25°C 75 110 110
IL = 1 mA 170 170
IL = 50 mA, TJ = 25°C 350 600 600
IL = 50 mA 1000 1000
IL = 150 mA, TJ = 25°C 850 1500 1500
IL = 150 mA 2500 2500
IL = 250 mA, TJ = 25°C 1500 2300 2300
IL = 250 mA 4000 4000
VON/OFF < 0.3 V, TJ = 25°C 0.01 0.8 0.8
VON/OFF < 0.15 V 0.05 2 2
VON/OFF ON/OFF input voltage(3) High = O/P ON 1.4 1.6 1.6 V
Low = O/P OFF 0.55 0.15 0.15
ION/OFF ON/OFF input current VON/OFF = 0 0.01 –2 –2 µA
VON/OFF = 5 V 5 15 15
en Output noise voltage (RMS) Bandwidth = 300 Hz to 50 kHz
COUT = 10 µF
CBYPASS = 10 nF		 30 µV
ΔVOUT/ΔVIN Ripple rejection f = 1 kHz, CBYPASS = 10 nF
COUT = 10 µF		 45 dB
IO(SC) Short-circuit current RL = 0 (steady state)(4) 400 mA
IO(PK) Peak output current VOUT ≥ VO(NOM) – 5% 350 mA
(1) Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using Statistical Quality Control (SQC) methods. The limits are used to calculate TI's Average Outgoing Quality Level (AOQL).
(2) VIN must be the greater of 2.2 V or VOUT(NOM) + dropout voltage to maintain output regulation. Dropout voltage is defined as the input-to-output differential at which the output voltage drops 2% below the value measured with a 1-V differential.
(3) The ON/OFF input must be properly driven to prevent possible mis-operation. For details, see Operation with ON/OFF Control.
(4) The LP2992 has thermal foldback current limiting which allows a high peak current when VOUT > 0.5 V, and then reduces the maximum output current as VOUT is forced to ground (see Typical Characteristics curves).

6.6 Typical Characteristics

Unless otherwise specified: CIN = 1 µF, COUT = 4.7 µF, VIN = VOUT(NOM) + 1 V, TA = 25°C, ON/OFF pin is tied to the IN pin.
LP2992 20029408.png Figure 1. VOUT vs Temperature
LP2992 20029410.png Figure 3. Short-Circuit Current
LP2992 20029413.png Figure 5. Ripple Rejection
LP2992 20029415.png Figure 7. Ripple Rejection
LP2992 20029417.png Figure 9. Ripple Rejection
LP2992 20029419.png Figure 11. Ripple Rejection
LP2992 20029422.png Figure 13. Ripple Rejection
LP2992 20029421.png Figure 15. Output Impedance vs Frequency
LP2992 20029425.png Figure 17. Output Noise Density
LP2992 20029427.png Figure 19. Dropout Voltage vs Temperature
LP2992 20029430.png Figure 21. IGND vs Load and Temperature
LP2992 20029433.png Figure 23. Load Transient Response
LP2992 20029447.png Figure 25. Load Transient Response
LP2992 20029436.png Figure 27. Line Transient Response
LP2992 20029438.png Figure 29. Line Transient Response
LP2992 20029440.png Figure 31. Turnon Time
LP2992 20029442.png Figure 33. Turnon Time
LP2992 20029409.png Figure 2. Short-Circuit Current
LP2992 20029411.png Figure 4. Short-Circuit Current vs Output Voltage
LP2992 20029414.png Figure 6. Ripple Rejection
LP2992 20029416.png Figure 8. Ripple Rejection
LP2992 20029418.png Figure 10. Ripple Rejection
LP2992 20029423.png Figure 12. Ripple Rejection
LP2992 20029420.png Figure 14. Output Impedance vs Frequency
LP2992 20029424.png Figure 16. Output Noise Density
LP2992 20029426.png Figure 18. GND Pin vs Load Current
LP2992 20029429.png Figure 20. Input Current vs Pin
LP2992 20029431.png Figure 22. Instantaneous Short-Circuit Current
LP2992 20029434.png Figure 24. Load Transient Response
LP2992 20029435.png Figure 26. Line Transient Response
LP2992 20029437.png Figure 28. Line Transient Response
LP2992 20029439.png Figure 30. Turnon Time
LP2992 20029441.png Figure 32. Turnon Time