SNVSAU6A November 2017 – June 2021 LP87332D
RESET is shown in Table 7-57, Address: 0x18
|Reserved - do not use||SW_RESET|
|7:1||Reserved - do not use||R/W||000 0000|
|0||SW_RESET||R/W||0||Software commanded reset. When written to 1, the registers will be reset to the default values, the OTP memory is read, and the I2C interface is reset.|
The bit is automatically cleared.