SLAS541M June   2007  – March 2022 MSP430F2416 , MSP430F2417 , MSP430F2418 , MSP430F2419 , MSP430F2616 , MSP430F2617 , MSP430F2618 , MSP430F2619


  1. Features
  2. Applications
  3. Description
  4. Functional Block Diagrams
  5. Revision History
  6. Device Comparison
    1. 6.1 Related Products
  7. Terminal Configuration and Functions
    1. 7.1 Pin Diagrams
    2. 7.2 Signal Descriptions
  8. Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Active Mode Supply Current Into VCC Excluding External Current
    5. 8.5  Typical Characteristics – Active Mode Supply Current (Into VCC)
    6. 8.6  Low-Power Mode Supply Currents (Into VCC) Excluding External Current
    7. 8.7  Typical Characteristics – LPM4 Current
    8. 8.8  Schmitt-Trigger Inputs (Ports P1 to P8, RST/NMI, JTAG, XIN, and XT2IN)
    9. 8.9  Inputs (Ports P1 and P2)
    10. 8.10 Leakage Current (Ports P1 to P8)
    11. 8.11 Standard Inputs ( RST/NMI)
    12. 8.12 Outputs (Ports P1 to P8)
    13. 8.13 Output Frequency (Ports P1 to P8)
    14. 8.14 Typical Characteristics – Outputs
    15. 8.15 POR and Brownout Reset (BOR)
    16. 8.16 Typical Characteristics – POR and BOR
    17. 8.17 Supply Voltage Supervisor (SVS), Supply Voltage Monitor (SVM)
    18. 8.18 Main DCO Characteristics
    19. 8.19 DCO Frequency
    20. 8.20 Calibrated DCO Frequencies – Tolerance at Calibration
    21. 8.21 Calibrated DCO Frequencies – Tolerance Over Temperature 0°C to 85°C
    22. 8.22 Calibrated DCO Frequencies – Tolerance Over Supply Voltage VCC
    23. 8.23 Calibrated DCO Frequencies – Overall Tolerance
    24. 8.24 Typical Characteristics – Calibrated DCO Frequency
    25. 8.25 Wake-up Times From Lower-Power Modes (LPM3, LPM4)
    26. 8.26 Typical Characteristics – DCO Clock Wake-up Time From LPM3 or LPM4
    27. 8.27 DCO With External Resistor ROSC
    28. 8.28 Typical Characteristics – DCO With External Resistor ROSC
    29. 8.29 Crystal Oscillator LFXT1, Low-Frequency Mode
    30. 8.30 Internal Very-Low-Power Low-Frequency Oscillator (VLO)
    31. 8.31 Crystal Oscillator LFXT1, High-Frequency Mode
    32. 8.32 Typical Characteristics – LFXT1 Oscillator in HF Mode (XTS = 1)
    33. 8.33 Crystal Oscillator XT2
    34. 8.34 Typical Characteristics – XT2 Oscillator
    35. 8.35 Timer_A
    36. 8.36 Timer_B
    37. 8.37 USCI (UART Mode)
    38. 8.38 USCI (SPI Master Mode)
    39. 8.39 USCI (SPI Slave Mode)
    40. 8.40 USCI (I2C Mode)
    41. 8.41 Comparator_A+
    42. 8.42 Typical Characteristics – Comparator_A+
    43. 8.43 12-Bit ADC Power Supply and Input Range Conditions
    44. 8.44 12-Bit ADC External Reference
    45. 8.45 12-Bit ADC Built-In Reference
    46. 8.46 12-Bit ADC Timing Parameters
    47. 8.47 12-Bit ADC Linearity Parameters
    48. 8.48 12-Bit ADC Temperature Sensor and Built-In VMID
    49. 8.49 12-Bit DAC Supply Specifications
    50. 8.50 12-Bit DAC Linearity Specifications
    51. 8.51 Typical Characteristics, 12-Bit DAC Linearity Specifications
    52. 8.52 12-Bit DAC Output Specifications
    53. 8.53 12-Bit DAC Reference Input Specifications
    54. 8.54 12-Bit DAC Dynamic Specifications
    55. 8.55 Flash Memory
    56. 8.56 RAM
    57. 8.57 JTAG Interface
    58. 8.58 JTAG Fuse
  9. Detailed Description
    1. 9.1  CPU
    2. 9.2  Instruction Set
    3. 9.3  Operating Modes
    4. 9.4  Interrupt Vector Addresses
    5. 9.5  Special Function Registers (SFRs)
    6. 9.6  Memory Organization
    7. 9.7  Bootloader (BSL)
    8. 9.8  Flash Memory
    9. 9.9  Peripherals
      1. 9.9.1  DMA Controller (MSP430F261x Only)
      2. 9.9.2  Oscillator and System Clock
      3. 9.9.3  Calibration Data Stored in Information Memory Segment A
      4. 9.9.4  Brownout, Supply Voltage Supervisor (SVS)
      5. 9.9.5  Digital I/O
      6. 9.9.6  Watchdog Timer (WDT+)
      7. 9.9.7  Hardware Multiplier
      8. 9.9.8  Universal Serial Communication Interface (USCI)
      9. 9.9.9  Timer_A3
      10. 9.9.10 Timer_B7
      11. 9.9.11 Comparator_A+
      12. 9.9.12 ADC12
      13. 9.9.13 DAC12 (MSP430F261x Only)
      14. 9.9.14 Peripheral File Map
    10. 9.10 Port Diagrams
      1. 9.10.1  Port P1 (P1.0 to P1.7), Input/Output With Schmitt Trigger
      2. 9.10.2  Port P2 (P2.0 to P2.4, P2.6, and P2.7), Input/Output With Schmitt Trigger
      3. 9.10.3  Port P2 (P2.5), Input/Output With Schmitt Trigger
      4. 9.10.4  Port P3 (P3.0 to P3.7), Input/Output With Schmitt Trigger
      5. 9.10.5  Port P4 (P4.0 to P4.7), Input/Output With Schmitt Trigger
      6. 9.10.6  Port P5 (P5.0 to P5.7), Input/Output With Schmitt Trigger
      7. 9.10.7  Port P6 (P6.0 to P6.4), Input/Output With Schmitt Trigger
      8. 9.10.8  Port P6 (P6.5 and P6.6), Input/Output With Schmitt Trigger
      9. 9.10.9  Port P6 (P6.7), Input/Output With Schmitt Trigger
      10. 9.10.10 Port P7 (P7.0 to P7.7), Input/Output With Schmitt Trigger
      11. 9.10.11 Port P8 (P8.0 to P8.5), Input/Output With Schmitt Trigger
      12. 9.10.12 Port P8 (P8.6), Input/Output With Schmitt Trigger
      13. 9.10.13 Port P8 (P8.7), Input/Output With Schmitt Trigger
      14. 9.10.14 JTAG Pins (TMS, TCK, TDI/TCLK, TDO/TDI) Input/Output With Schmitt Trigger
      15. 9.10.15 JTAG Fuse Check Mode
  10. 10Device and Documentation Support
    1. 10.1 Getting Started
    2. 10.2 Device Nomenclature
    3. 10.3 Tools and Software
    4. 10.4 Documentation Support
    5. 10.5 Support Resources
    6. 10.6 Trademarks
    7. 10.7 Electrostatic Discharge Caution
    8. 10.8 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Peripheral File Map

Table 9-14 lists the supported registers for each peripheral module.

Table 9-14 Peripherals File Map
DMA(1) DMA channel 2 transfer size DMA2SZ 0x01F2
DMA channel 2 destination address DMA2DA 0x01EE
DMA channel 2 source address DMA2SA 0x01EA
DMA channel 2 control DMA2CTL 0x01E8
DMA channel 1 transfer size DMA1SZ 0x01E6
DMA channel 1 destination address DMA1DA 0x01E2
DMA channel 1 source address DMA1SA 0x01DE
DMA channel 1 control DMA1CTL 0x01DC
DMA channel 0 transfer size DMA0SZ 0x01DA
DMA channel 0 destination address DMA0DA 0x01D6
DMA channel 0 source address DMA0SA 0x01D2
DMA channel 0 control DMA0CTL 0x01D0
DMA module interrupt vector word DMAIV 0x0126
DMA module control 1 DMACTL1 0x0124
DMA module control 0 DMACTL0 0x0122
DAC12(1) DAC12_1 data DAC12_1DAT 0x01CA
DAC12_1 control DAC12_1CTL 0x01C2
DAC12_0 data DAC12_0DAT 0x01C8
DAC12_0 control DAC12_0CTL 0x01C0
ADC12 Interrupt vector word ADC12IV 0x01A8
Interrupt enable ADC12IE 0x01A6
Interrupt flag ADC12IFG 0x01A4
Control 1 ADC12CTL1 0x01A2
Control 0 ADC12CTL0 0x01A0
Conversion memory 15 ADC12MEM15 0x015E
Conversion memory 14 ADC12MEM14 0x015C
Conversion memory 13 ADC12MEM13 0x015A
Conversion memory 12 ADC12MEM12 0x0158
Conversion memory 11 ADC12MEM11 0x0156
Conversion memory 10 ADC12MEM10 0x0154
Conversion memory 9 ADC12MEM9 0x0152
Conversion memory 8 ADC12MEM8 0x0150
Conversion memory 7 ADC12MEM7 0x014E
Conversion memory 6 ADC12MEM6 0x014C
Conversion memory 5 ADC12MEM5 0x014A
Conversion memory 4 ADC12MEM4 0x0148
Conversion memory 3 ADC12MEM3 0x0146
Conversion memory 2 ADC12MEM2 0x0144
Conversion memory 1 ADC12MEM1 0x0142
Conversion memory 0 ADC12MEM0 0x0140
ADC memory control 15 ADC12MCTL15 0x008F
ADC memory control 14 ADC12MCTL14 0x008E
ADC memory control 13 ADC12MCTL13 0x008D
ADC memory control 12 ADC12MCTL12 0x008C
ADC memory control 11 ADC12MCTL11 0x008B
ADC memory control 10 ADC12MCTL10 0x008A
ADC memory control 9 ADC12MCTL9 0x0089
ADC memory control 8 ADC12MCTL8 0x0088
ADC memory control 7 ADC12MCTL7 0x0087
ADC memory control 6 ADC12MCTL6 0x0086
ADC memory control 5 ADC12MCTL5 0x0085
ADC memory control 4 ADC12MCTL4 0x0084
ADC memory control 3 ADC12MCTL3 0x0083
ADC memory control 2 ADC12MCTL2 0x0082
ADC memory control 1 ADC12MCTL1 0x0081
ADC memory control 0 ADC12MCTL0 0x0080
Timer_B7 Capture/compare 6 TBCCR6 0x019E
Capture/compare 5 TBCCR5 0x019C
Capture/compare 4 TBCCR4 0x019A
Capture/compare 3 TBCCR3 0x0198
Capture/compare 2 TBCCR2 0x0196
Capture/compare 1 TBCCR1 0x0194
Capture/compare 0 TBCCR0 0x0192
Timer_B counter TBR 0x0190
Capture/compare control 6 TBCCTL6 0x018E
Capture/compare control 5 TBCCTL5 0x018C
Capture/compare control 4 TBCCTL4 0x018A
Capture/compare control 3 TBCCTL3 0x0188
Capture/compare control 2 TBCCTL2 0x0186
Capture/compare control 1 TBCCTL1 0x0184
Capture/compare control 0 TBCCTL0 0x0182
Timer_B control TBCTL 0x0180
Timer_B interrupt vector TBIV 0x011E
Timer_A3 Capture/compare 2 TACCR2 0x0176
Capture/compare 1 TACCR1 0x0174
Capture/compare 0 TACCR0 0x0172
Timer_A counter TAR 0x0170
Reserved 0x016E
Reserved 0x016C
Reserved 0x016A
Reserved 0x0168
Capture/compare control 2 TACCTL2 0x0166
Capture/compare control 1 TACCTL1 0x0164
Capture/compare control 0 TACCTL0 0x0162
Timer_A control TACTL 0x0160
Timer_A interrupt vector TAIV 0x012E
Hardware multiplier Sum extend SUMEXT 0x013E
Result high word RESHI 0x013C
Result low word RESLO 0x013A
Second operand OP2 0x0138
Multiply signed +accumulate/operand 1 MACS 0x0136
Multiply+accumulate/operand 1 MAC 0x0134
Multiply signed/operand 1 MPYS 0x0132
Multiply unsigned/operand 1 MPY 0x0130
Flash Flash control 4 FCTL4 0x01BE
Flash control 3 FCTL3 0x012C
Flash control 2 FCTL2 0x012A
Flash control 1 FCTL1 0x0128
Watchdog Watchdog Timer control WDTCTL 0x0120
USCI_A0, USCI_B0 USCI_A0 auto baud rate control UCA0ABCTL 0x005D
USCI_A0 transmit buffer UCA0TXBUF 0x0067
USCI_A0 receive buffer UCA0RXBUF 0x0066
USCI_A0 status UCA0STAT 0x0065
USCI_A0 modulation control UCA0MCTL 0x0064
USCI_A0 baud rate control 1 UCA0BR1 0x0063
USCI_A0 baud rate control 0 UCA0BR0 0x0062
USCI_A0 control 1 UCA0CTL1 0x0061
USCI_A0 control 0 UCA0CTL0 0x0060
USCI_A0 IrDA receive control UCA0IRRCTL 0x005F
USCI_A0 IrDA transmit control UCA0IRTCLT 0x005E
USCI_B0 transmit buffer UCB0TXBUF 0x006F
USCI_B0 receive buffer UCB0RXBUF 0x006E
USCI_B0 status UCB0STAT 0x006D
USCI_B0 I2C Interrupt enable UCB0CIE 0x006C
USCI_B0 baud rate control 1 UCB0BR1 0x006B
USCI_B0 baud rate control 0 UCB0BR0 0x006A
USCI_B0 control 1 UCB0CTL1 0x0069
USCI_B0 control 0 UCB0CTL0 0x0068
USCI_B0 I2C slave address UCB0SA 0x011A
USCI_B0 I2C own address UCB0OA 0x0118
USCI_A1, USCI_B1 USCI_A1 auto baud rate control UCA1ABCTL 0x00CD
USCI_A1 transmit buffer UCA1TXBUF 0x00D7
USCI_A1 receive buffer UCA1RXBUF 0x00D6
USCI_A1 status UCA1STAT 0x00D5
USCI_A1 modulation control UCA1MCTL 0x00D4
USCI_A1 baud rate control 1 UCA1BR1 0x00D3
USCI_A1 baud rate control 0 UCA1BR0 0x00D2
USCI_A1 control 1 UCA1CTL1 0x00D1
USCI_A1 control 0 UCA1CTL0 0x00D0
USCI_A1 IrDA receive control UCA1IRRCTL 0x00CF
USCI_A1 IrDA transmit control UCA1IRTCLT 0x00CE
USCI_B1 transmit buffer UCB1TXBUF 0x00DF
USCI_B1 receive buffer UCB1RXBUF 0x00DE
USCI_B1 status UCB1STAT 0x00DD
USCI_B1 I2C Interrupt enable UCB1CIE 0x00DC
USCI_B1 baud rate control 1 UCB1BR1 0x00DB
USCI_B1 baud rate control 0 UCB1BR0 0x00DA
USCI_B1 control 1 UCB1CTL1 0x00D9
USCI_B1 control 0 UCB1CTL0 0x00D8
USCI_B1 I2C slave address UCB1SA 0x017E
USCI_B1 I2C own address UCB1OA 0x017C
USCI_A1/B1 interrupt enable UC1IE 0x0006
USCI_A1/B1 interrupt flag UC1IFG 0x0007
Comparator_A+ Comparator_A port disable CAPD 0x005B
Comparator_A control2 CACTL2 0x005A
Comparator_A control1 CACTL1 0x0059
Basic clock Basic clock system control 3 BCSCTL3 0x0053
Basic clock system control 2 BCSCTL2 0x0058
Basic clock system control 1 BCSCTL1 0x0057
DCO clock frequency control DCOCTL 0x0056
Brownout, SVS SVS control (reset by brownout signal) SVSCTL 0x0055
Port PA(2) Port PA resistor enable PAREN 0x0014
Port PA selection PASEL 0x003E
Port PA direction PADIR 0x003C
Port PA output PAOUT 0x003A
Port PA input PAIN 0x0038
Port P8(2) Port P8 resistor enable P8REN 0x0015
Port P8 selection P8SEL 0x003F
Port P8 direction P8DIR 0x003D
Port P8 output P8OUT 0x003B
Port P8 input P8IN 0x0039
Port P7(2) Port P7 resistor enable P7REN 0x0014
Port P7 selection P7SEL 0x003E
Port P7 direction P7DIR 0x003C
Port P7 output P7OUT 0x003A
Port P7 input P7IN 0x0038
Port P6 Port P6 resistor enable P6REN 0x0013
Port P6 selection P6SEL 0x0037
Port P6 direction P6DIR 0x0036
Port P6 output P6OUT 0x0035
Port P6 input P6IN 0x0034
Port P5 Port P5 resistor enable P5REN 0x0012
Port P5 selection P5SEL 0x0033
Port P5 direction P5DIR 0x0032
Port P5 output P5OUT 0x0031
Port P5 input P5IN 0x0030
Port P4 Port P4 selection P4SEL 0x001F
Port P4 resistor enable P4REN 0x0011
Port P4 direction P4DIR 0x001E
Port P4 output P4OUT 0x001D
Port P4 input P4IN 0x001C
Port P3 Port P3 resistor enable P3REN 0x0010
Port P3 selection P3SEL 0x001B
Port P3 direction P3DIR 0x001A
Port P3 output P3OUT 0x0019
Port P3 input P3IN 0x0018
Port P2 Port P2 resistor enable P2REN 0x002F
Port P2 selection P2SEL 0x002E
Port P2 interrupt enable P2IE 0x002D
Port P2 interrupt-edge select P2IES 0x002C
Port P2 interrupt flag P2IFG 0x002B
Port P2 direction P2DIR 0x002A
Port P2 output P2OUT 0x0029
Port P2 input P2IN 0x0028
Port P1 Port P1 resistor enable P1REN 0x0027
Port P1 selection P1SEL 0x0026
Port P1 interrupt enable P1IE 0x0025
Port P1 interrupt-edge select P1IES 0x0024
Port P1 interrupt flag P1IFG 0x0023
Port P1 direction P1DIR 0x0022
Port P1 output P1OUT 0x0021
Port P1 input P1IN 0x0020
Special functions SFR interrupt flag 2 IFG2 0x0003
SFR interrupt flag 1 IFG1 0x0002
SFR interrupt enable 2 IE2 0x0001
SFR interrupt enable 1 IE1 0x0000
MSP430F261x devices only
80-pin PN and 113-pin ZCA or ZQW devices only