SLASEU5A October 2019 – February 2021 MSP430F5438A-ET
PRODUCTION DATA
Table 6-1 describes the signals.
SIGNAL NAME | NO. | I/O | DESCRIPTION |
---|---|---|---|
P6.4/A4 | A1 | I/O | General-purpose digital I/O Analog input A4 – ADC |
P6.5/A5 | E4 | I/O | General-purpose digital I/O Analog input A5 – ADC |
P6.6/A6 | B1 | I/O | General-purpose digital I/O Analog input A6 – ADC |
P6.7/A7 | C2 | I/O | General-purpose digital I/O Analog input A7 – ADC |
P7.4/A12 | F4 | I/O | General-purpose digital I/O Analog input A12 –ADC |
P7.5/A13 | C1 | I/O | General-purpose digital I/O Analog input A13 – ADC |
P7.6/A14 | D2 | I/O | General-purpose digital I/O Analog input A14 – ADC |
P7.7/A15 | G4 | I/O | General-purpose digital I/O Analog input A15 – ADC |
P5.0/A8/VREF+/VeREF+ | D1 | I/O | General-purpose digital I/O Analog input A8 – ADC Output of reference voltage to the ADC Input for an external reference voltage to the ADC |
P5.1/A9/VREF-/VeREF- | E1 | I/O | General-purpose digital I/O Analog input A9 – ADC Negative terminal for the ADC's reference voltage for both sources, the internal reference voltage, or an external applied reference voltage |
AVCC | E2 | Analog power supply | |
AVSS | F2 | Analog ground supply | |
P7.0/XIN | F1 | I/O | General-purpose digital I/O Input terminal for crystal oscillator XT1 |
P7.1/XOUT | G1 | I/O | General-purpose digital I/O Output terminal of crystal oscillator XT1 |
DVSS1 | G2 | Digital ground supply | |
DVCC1 | H2 | Digital power supply | |
P1.0/TA0CLK/ACLK | H1 | I/O | General-purpose digital I/O with port interrupt TA0 clock signal TACLK input ACLK output (divided by 1, 2, 4, 8, 16, or 32) |
P1.1/TA0.0 | H4 | I/O | General-purpose digital I/O with port interrupt TA0 CCR0 capture: CCI0A input, compare: Out0 output BSL transmit output |
P1.2/TA0.1 | J4 | I/O | General-purpose digital I/O with port interrupt TA0 CCR1 capture: CCI1A input, compare: Out1 output BSL receive input |
P1.3/TA0.2 | J1 | I/O | General-purpose digital I/O with port interrupt TA0 CCR2 capture: CCI2A input, compare: Out2 output |
P1.4/TA0.3 | J2 | I/O | General-purpose digital I/O with port interrupt TA0 CCR3 capture: CCI3A input compare: Out3 output |
P1.5/TA0.4 | K1 | I/O | General-purpose digital I/O with port interrupt TA0 CCR4 capture: CCI4A input, compare: Out4 output |
P1.6/SMCLK | K2 | I/O | General-purpose digital I/O with port interrupt SMCLK output |
P1.7 | L1 | I/O | General-purpose digital I/O with port interrupt |
P2.0/TA1CLK/MCLK | M1 | I/O | General-purpose digital I/O with port interrupt TA1 clock signal TA1CLK input MCLK output |
P2.1/TA1.0 | L2 | I/O | General-purpose digital I/O with port interrupt TA1 CCR0 capture: CCI0A input, compare: Out0 output |
P2.2/TA1.1 | M2 | I/O | General-purpose digital I/O with port interrupt TA1 CCR1 capture: CCI1A input, compare: Out1 output |
P2.3/TA1.2 | L3 | I/O | General-purpose digital I/O with port interrupt TA1 CCR2 capture: CCI2A input, compare: Out2 output |
P2.4/RTCCLK | M3 | I/O | General-purpose digital I/O with port interrupt RTCCLK output |
P2.5 | L4 | I/O | General-purpose digital I/O with port interrupt |
P2.6/ACLK | M4 | I/O | General-purpose digital I/O with port interrupt ACLK output (divided by 1, 2, 4, 8, 16, or 32) |
P2.7/ADC12CLK/DMAE0 | J5 | I/O | General-purpose digital I/O with port interrupt Conversion clock output ADC DMA external trigger input |
P3.0/UCB0STE/UCA0CLK | L5 | I/O | General-purpose digital I/O Slave transmit enable – USCI_B0 SPI mode Clock signal input – USCI_A0 SPI slave mode Clock signal output – USCI_A0 SPI master mode |
P3.1/UCB0SIMO/UCB0SDA | M5 | I/O | General-purpose digital I/O Slave in, master out – USCI_B0 SPI mode I2C data – USCI_B0 I2C mode |
P3.2/UCB0SOMI/UCB0SCL | J6 | I/O | General-purpose digital I/O Slave out, master in – USCI_B0 SPI mode I2C clock – USCI_B0 I2C mode |
P3.3/UCB0CLK/UCA0STE | L6 | I/O | General-purpose digital I/O Clock signal input – USCI_B0 SPI slave mode Clock signal output – USCI_B0 SPI master mode Slave transmit enable – USCI_A0 SPI mode |
DVSS3 | M6 | Digital ground supply | |
DVCC3 | M7 | Digital power supply | |
P3.4/UCA0TXD/UCA0SIMO | L7 | I/O | General-purpose digital I/O Transmit data – USCI_A0 UART mode Slave in, master out – USCI_A0 SPI mode |
P3.5/UCA0RXD/UCA0SOMI | J7 | I/O | General-purpose digital I/O Receive data – USCI_A0 UART mode Slave out, master in – USCI_A0 SPI mode |
P3.6/UCB1STE/UCA1CLK | M8 | I/O | General-purpose digital I/O Slave transmit enable – USCI_B1 SPI mode Clock signal input – USCI_A1 SPI slave mode Clock signal output – USCI_A1 SPI master mode |
P3.7/UCB1SIMO/UCB1SDA | L8 | I/O | General-purpose digital I/O Slave in, master out – USCI_B1 SPI mode I2C data – USCI_B1 I2C mode |
P4.0/TB0.0 | J8 | I/O | General-purpose digital I/O TB0 capture CCR0: CCI0A/CCI0B input, compare: Out0 output |
P4.1/TB0.1 | M9 | I/O | General-purpose digital I/O TB0 capture CCR1: CCI1A/CCI1B input, compare: Out1 output |
P4.2/TB0.2 | L9 | I/O | General-purpose digital I/O TB0 capture CCR2: CCI2A/CCI2B input, compare: Out2 output |
P4.3/TB0.3 | L10 | I/O | General-purpose digital I/O TB0 capture CCR3: CCI3A/CCI3B input, compare: Out3 output |
P4.4/TB0.4 | M10 | I/O | General-purpose digital I/O TB0 capture CCR4: CCI4A/CCI4B input, compare: Out4 output |
P4.5/TB0.5 | L11 | I/O | General-purpose digital I/O TB0 capture CCR5: CCI5A/CCI5B input, compare: Out5 output |
P4.6/TB0.6 | M11 | I/O | General-purpose digital I/O TB0 capture CCR6: CCI6A/CCI6B input, compare: Out6 output |
P4.7/TB0CLK/SMCLK | M12 | I/O | General-purpose digital I/O TB0 clock input SMCLK output |
P5.4/UCB1SOMI/UCB1SCL | L12 | I/O | General-purpose digital I/O Slave out, master in – USCI_B1 SPI mode I2C clock – USCI_B1 I2C mode |
P5.5/UCB1CLK/UCA1STE | J9 | I/O | General-purpose digital I/O Clock signal input – USCI_B1 SPI slave mode Clock signal output – USCI_B1 SPI master mode Slave transmit enable – USCI_A1 SPI mode |
P5.6/UCA1TXD/UCA1SIMO | K11 | I/O | General-purpose digital I/O Transmit data – USCI_A1 UART mode Slave in, master out – USCI_A1 SPI mode |
P5.7/UCA1RXD/UCA1SOMI | K12 | I/O | General-purpose digital I/O Receive data – USCI_A1 UART mode Slave out, master in – USCI_A1 SPI mode |
P7.2/TB0OUTH/SVMOUT | J11 | I/O | General-purpose digital I/O Switch all PWM outputs high impedance – Timer TB0 SVM output |
P7.3/TA1.2 | J12 | I/O | General-purpose digital I/O TA1 CCR2 capture: CCI2B input, compare: Out2 output |
P8.0/TA0.0 | H9 | I/O | General-purpose digital I/O TA0 CCR0 capture: CCI0B input, compare: Out0 output |
P8.1/TA0.1 | H11 | I/O | General-purpose digital I/O TA0 CCR1 capture: CCI1B input, compare: Out1 output |
P8.2/TA0.2 | H12 | I/O | General-purpose digital I/O TA0 CCR2 capture: CCI2B input, compare: Out2 output |
P8.3/TA0.3 | G9 | I/O | General-purpose digital I/O TA0 CCR3 capture: CCI3B input, compare: Out3 output |
P8.4/TA0.4 | G11 | I/O | General-purpose digital I/O TA0 CCR4 capture: CCI4B input, compare: Out4 output |
VCORE(2) | G12 | Regulated core power supply output (internal use only, no external current loading) | |
DVSS2 | F12 | Digital ground supply | |
DVCC2 | E12 | Digital power supply | |
P8.5/TA1.0 | F11 | I/O | General-purpose digital I/O TA1 CCR0 capture: CCI0B input, compare: Out0 output |
P8.6/TA1.1 | E11 | I/O | General-purpose digital I/O TA1 CCR1 capture: CCI1B input, compare: Out1 output |
P8.7 | D12 | I/O | General-purpose digital I/O |
P9.0/UCB2STE/UCA2CLK | D11 | I/O | General-purpose digital I/O Slave transmit enable – USCI_B2 SPI mode Clock signal input – USCI_A2 SPI slave mode Clock signal output – USCI_A2 SPI master mode |
P9.1/UCB2SIMO/UCB2SDA | F9 | I/O | General-purpose digital I/O Slave in, master out – USCI_B2 SPI mode I2C data – USCI_B2 I2C mode |
P9.2/UCB2SOMI/UCB2SCL | C12 | I/O | General-purpose digital I/O Slave out, master in – USCI_B2 SPI mode I2C clock – USCI_B2 I2C mode |
P9.3/UCB2CLK/UCA2STE | E9 | I/O | General-purpose digital I/O Clock signal input – USCI_B2 SPI slave mode Clock signal output – USCI_B2 SPI master mode Slave transmit enable – USCI_A2 SPI mode |
P9.4/UCA2TXD/UCA2SIMO | C11 | I/O | General-purpose digital I/O Transmit data – USCI_A2 UART mode Slave in, master out – USCI_A2 SPI mode |
P9.5/UCA2RXD/UCA2SOMI | B12 | I/O | General-purpose digital I/O Receive data – USCI_A2 UART mode Slave out, master in – USCI_A2 SPI mode |
P9.6 | B11 | I/O | General-purpose digital I/O |
P9.7 | A12 | I/O | General-purpose digital I/O |
P10.0/UCB3STE/UCA3CLK | D9 | I/O | General-purpose digital I/O Slave transmit enable – USCI_B3 SPI mode Clock signal input – USCI_A3 SPI slave mode Clock signal output – USCI_A3 SPI master mode |
P10.1/UCB3SIMO/UCB3SDA | A11 | I/O | General-purpose digital I/O Slave in, master out – USCI_B3 SPI mode I2C data – USCI_B3 I2C mode |
P10.2/UCB3SOMI/UCB3SCL | D8 | I/O | General-purpose digital I/O Slave out, master in – USCI_B3 SPI mode I2C clock – USCI_B3 I2C mode |
P10.3/UCB3CLK/UCA3STE | B10 | I/O | General-purpose digital I/O Clock signal input – USCI_B3 SPI slave mode Clock signal output – USCI_B3 SPI master mode Slave transmit enable – USCI_A3 SPI mode |
P10.4/UCA3TXD/UCA3SIMO | A10 | I/O | General-purpose digital I/O Transmit data – USCI_A3 UART mode Slave in, master out – USCI_A3 SPI mode |
P10.5/UCA3RXD/UCA3SOMI | B9 | I/O | General-purpose digital I/O Receive data – USCI_A3 UART mode Slave out, master in – USCI_A3 SPI mode |
P10.6 | A9 | I/O | General-purpose digital I/O |
P10.7 | B8 | I/O | General-purpose digital I/O |
P11.0/ACLK | A8 | I/O | General-purpose digital I/O ACLK output (divided by 1, 2, 4, 8, 16, or 32) |
P11.1/MCLK | D7 | I/O | General-purpose digital I/O MCLK output |
P11.2/SMCLK | A7 | I/O | General-purpose digital I/O SMCLK output |
DVCC4 | B7 | Digital power supply | |
DVSS4 | B6 | Digital ground supply | |
P5.2/XT2IN | A6 | I/O | General-purpose digital I/O Input terminal for crystal oscillator XT2 |
P5.3/XT2OUT | A5 | I/O | General-purpose digital I/O Output terminal of crystal oscillator XT2 |
TEST/SBWTCK(3) | D6 | I | Test mode pin – Selects four wire JTAG operation. Spy-Bi-Wire input clock when Spy-Bi-Wire operation activated |
PJ.0/TDO(4) | B5 | I/O | General-purpose digital I/O JTAG test data output port |
PJ.1/TDI/TCLK(4) | A4 | I/O | General-purpose digital I/O JTAG test data input or test clock input |
PJ.2/TMS(4) | D5 | I/O | General-purpose digital I/O JTAG test mode select |
PJ.3/TCK(4) | B4 | I/O | General-purpose digital I/O JTAG test clock |
RST/NMI/SBWTDIO(3) | A3 | I/O | Reset input active low Non-maskable interrupt input Spy-Bi-Wire data input/output when Spy-Bi-Wire operation activated. |
P6.0/A0 | D4 | I/O | General-purpose digital I/O Analog input A0 – ADC |
P6.1/A1 | B3 | I/O | General-purpose digital I/O Analog input A1 – ADC |
P6.2/A2 | A2 | I/O | General-purpose digital I/O Analog input A2 – ADC |
P6.3/A3 | B2 | I/O | General-purpose digital I/O Analog input A3 – ADC |
Reserved | (1) |