Table 5-7 Inputs, Ports P1 and P2(1) over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
||External interrupt timing(2)
||Port P1, P2: P1.x to P2.x, External trigger pulse duration to set interrupt flag
||2.2 V, 3 V
(1) Some devices may contain additional ports with interrupts. See the block diagram and terminal function descriptions.
(2) An external signal sets the interrupt flag every time the minimum interrupt pulse duration t(int) is met. It might be set by trigger signals shorter than t(int).
Table 5-8 lists the leakage currents of the GPIOs.