The ADC is not available on the MSP430FR2000 device.
Figure 1-1 Functional Block Diagram
The device has one main power pair of DVCC and DVSS that supplies both digital and analog modules. Recommended bypass and decoupling capacitors are 4.7 µF to 10 µF and 0.1 µF, respectively, with ±5% accuracy.
Four pins of P1 and four pins of P2 feature the pin-interrupt function and can wake the MCU from all LPMs, including LPM4, LPM3.5, and LPM4.5.
The Timer_B3 has three capture/compare registers. Only CCR1 and CCR2 are externally connected. CCR0 registers can be used only for internal period timing and interrupt generation.
In LPM3.5, the RTC counter and backup memory can be functional while the rest of peripherals are off.
All general-purpose I/Os can be configured as Capacitive Touch I/Os.