Refer to the PDF data sheet for device specific package drawings
The MSP432P4xx family of MCUs incorporates a part number for the device for the IDEs to recognize the device, in addition to the device IDs specified in the device descriptors (TLV). This section describes how this information is organized on the device.
IEEE 1149.1 defines the use of a IDCODE register in the JTAG chain to provide the fields in Table 6-87
|Bit Position||Field Description|
|27-12||Part number of the device|
|0||Reserved (always tied to 1)|
On MSP432P4xx MCUs, all these fields are implemented on the Arm Cortex-M4 ROM table. The part number can be read by the IDE tools (TI internal or third party) to determine the device. Figure 6-20 shows the Peripheral ID register bit descriptions from the Arm Cortex-M4 specifications. See the Arm Debug interface V5 Architecture Specification for bit-level details on the Arm Cortex-M4 Peripheral ID registers.
For the MSP432P4xx MCUs, the Revision and RevAnd fields are used for tracking the major and minor revisions. Also the Customer modified (4-bit) field is used for extending the Part number to 16 bits, to accommodate all of the fields needed by IEEE 1149.1 in the ROM table.
As an example, the ROM table with IEEE 1149.1-complaint device IDCODE for the MSP432P401xx MCU is 0000-1011-1001-1010-1111-0000-0010-1111 (see Figure 6-21).