SLAS826H March 2015 – June 2019 MSP432P401M , MSP432P401R
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
In the case of the Arm µDMA controller, it is usually the responsibility of software to maintain a list of channels that have completed their operation. To provide further flexibility, the MSP432P401x DMA supports four DMA completion interrupts, which are mapped in the following way:
NOTE
Software must make sure that DMA_INT1, DMA_INT2, and DMA_INT3 are mapped to different channels, so that the same channel does not result in multiple interrupts at the NVIC.