Refer to the PDF data sheet for device specific package drawings
The MSP432P401x MCUs include a high-endurance low-power flash memory that supports up to a minimum of 20000 write or erase cycles. The flash memory is 128 bits wide, thereby enabling high code execution performance by virtue of each fetch returning up to four 32-bit instructions (or up to eight 16-bit instructions). The flash is further divided into two types of subregions: main memory and information memory.
From a physical perspective, the flash memory comprises two banks, with the main and information memory regions divided equally between the two banks. This permits an application to carry out a simultaneous read or execute operation from one bank while the other bank may be undergoing a program or erase operation.
Figure 6-5 shows the memory map of the flash on MSP432P401x MCUs.