SLAS826H March 2015 – June 2019 MSP432P401M , MSP432P401R
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
PARAMETER | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|
tSOFT | Latency from release of soft reset to first CPU instruction fetch | 5 | MCLK cycles | ||
tHARD | Latency from release of hard reset to release of soft reset | 25 | MCLK cycles | ||
tPOR | Latency from release of device POR to release of hard reset | 15 | 25 | µs | |
tCOLDPWR,100 nF | Latency from a cold power-up condition to release of device POR, CVCORE = 100 nF | 300 | 400 | µs | |
tCOLDPWR,4.7 µF | Latency from a cold power-up condition to release of device POR, CVCORE = 4.7 µF | 400 | 500 | µs |
Table 5-2 lists the latencies to recover from an external reset applied on RSTn pin.