Refer to the PDF data sheet for device specific package drawings
The MSP432P401x MCUs support up to 64KB of SRAM, with the rest of the 1MB SRAM region reserved. The SRAM is aliased in both Code and SRAM zones. This enables fast single-cycle execution of code from the SRAM, as the Cortex-M4 processor pipelines instruction fetches to memory zones other than the Code space. As with the flash memory, the SRAM can be powered down or placed in a low-leakage retention state in low-power modes of operation.
Figure 6-6 shows the memory map of SRAM on MSP432P401x MCUs.