Refer to the PDF data sheet for device specific package drawings
The SYSCTL is a set of various miscellaneous features of the device, including SRAM bank configuration, RSTn/NMI function selection, and peripheral halt control. In addition, the SYSCTL enables device security features like JTAG and SWD lock and IP protection, which can be used to protect unauthorized accesses either to the entire device memory map or to certain selected regions of the flash. See the System Controller chapter in the MSP432P4xx SimpleLink™ Microcontrollers Technical Reference Manual for more details.
As is the case with the Cortex-M4 system control registers (in the internal PPB space), the System Controller module registers are mapped to the Cortex-M4 external PPB. This keeps the System Controller module accessible even when Hard or Soft resets are active.