SLVSK82 October   2026 MSPM0L1126-Q1 , MSPM0L1127-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Functional Block Diagram
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
    1. 6.1 Pin Diagrams
    2. 6.2 Pin Attributes
      1.      10
    3. 6.3 Signal Descriptions
      1.      12
      2.      13
      3.      14
      4.      15
      5.      16
      6.      17
      7.      18
      8.      19
      9.      20
      10.      21
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Supply Current Characteristics
      1. 7.5.1 RUN/SLEEP Modes
      2. 7.5.2 STOP/STANDBY Modes
      3. 7.5.3 SHUTDOWN Mode
    6. 7.6  Power Supply Sequencing
      1. 7.6.1 Power Supply Ramp
      2. 7.6.2 POR and BOR
    7. 7.7  Flash Memory Characteristics
    8. 7.8  Timing Characteristics
    9. 7.9  Clock Specifications
      1. 7.9.1 System Oscillator (SYSOSC)
      2. 7.9.2 Low Frequency Oscillator (LFOSC)
      3. 7.9.3 Low Frequency Crystal/Clock
      4. 7.9.4 High Frequency Crystal/Clock
    10. 7.10 Digital IO
      1. 7.10.1 Electrical Characteristics
      2. 7.10.2 Switching Characteristics
    11. 7.11 Analog Mux VBOOST
    12. 7.12 ADC
      1. 7.12.1 Electrical Characteristics
      2. 7.12.2 Switching Characteristics
      3. 7.12.3 Linearity Parameters
      4. 7.12.4 Typical Connection Diagram
    13. 7.13 Temperature Sensor
    14. 7.14 VREF
      1. 7.14.1 Voltage Characteristics
      2. 7.14.2 Electrical Characteristics
    15. 7.15 Comparator (COMP)
      1. 7.15.1 Comparator Electrical Characteristics
    16. 7.16 I2C
      1. 7.16.1 I2C Characteristics
      2. 7.16.2 I2C Filter
      3. 7.16.3 I2C Timing Diagram
    17. 7.17 SPI
      1. 7.17.1 SPI
      2. 7.17.2 SPI Timing Diagram
    18. 7.18 UART
    19. 7.19 TIMx
    20. 7.20 Emulation and Debug
      1. 7.20.1 SWD Timing
  9. 8 Detailed Description
    1. 8.1  CPU
    2. 8.2  Operating Modes
      1. 8.2.1 Functionality by Operating Mode
    3. 8.3  Power Management Unit (PMU)
    4. 8.4  Clock Module (CKM)
    5. 8.5  DMA Trigger Mapping
    6. 8.6  Events
    7. 8.7  Memory
      1. 8.7.1 Memory Organization
      2. 8.7.2 Peripherals Summary
      3. 8.7.3 Interrupt Vector Number
    8. 8.8  Flash Memory
    9. 8.9  SRAM
    10. 8.10 GPIO
    11. 8.11 IOMUX
    12. 8.12 ADC
    13. 8.13 Temperature Sensor
    14. 8.14 LFSS
    15. 8.15 IWDT
    16. 8.16 RTC_B
    17. 8.17 VREF
    18. 8.18 COMP
    19. 8.19 Security
    20. 8.20 AESADV
    21. 8.21 CRC
    22. 8.22 Keystore
    23. 8.23 UNICOMM (UART/I2C/SPI)
      1. 8.23.1 UART (UNICOMM)
      2. 8.23.2 I2C (UNICOMM)
      3. 8.23.3 SPI (UNICOMM)
    24. 8.24 WWDT
    25. 8.25 Timers (TIMx)
    26. 8.26 Device Analog Connections
    27. 8.27 Input/Output Diagrams
    28. 8.28 DEBUGSS
    29. 8.29 Serial Wire Debug Interface
    30. 8.30 Bootstrap Loader (BSL)
    31. 8.31 Device Factory Constants
    32. 8.32 Identification
  10. 9 Applications, Implementation, and Layout
    1. 9.1 Typical Application
      1. 9.1.1 Schematic
  11. 10Device and Documentation Support
    1. 10.1 Getting Started and Next Steps
    2. 10.2 Device Nomenclature
    3. 10.3 Tools and Software
    4. 10.4 Documentation Support
    5. 10.5 Support Resources
    6. 10.6 Trademarks
    7. 10.7 Electrostatic Discharge Caution
    8. 10.8 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Mechanical Data

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Table 6-3 Analog to Digital Converter (ADC) Signal Descriptions
SIGNAL
NAME		 PIN
TYPE		 DESCRIPTION PM PIN PT PIN RGZ PIN RGE PIN RHB PIN
ADC0_VREF+ A ADC0 voltage reference (VREF) power supply 24 43 43 19 27
ADC0_VREF- A ADC0 voltage reference (VREF) ground supply 17 39 39 17 25
ADC0_0 A ADC0 analog input channel 0 31 47 47 31
ADC0_1 A ADC0 analog input channel 1 30 46 46 22 30
ADC0_2 A ADC0 analog input channel 2 26 45 45 21 29
ADC0_3 A ADC0 analog input channel 3 25 44 44 20 28
ADC0_4 A ADC0 analog input channel 4 27
ADC0_5 A ADC0 analog input channel 5 23 42 42
ADC0_6 A ADC0 analog input channel 6 19 41 41
ADC0_7 A ADC0 analog input channel 7 18 40 40 18 26
ADC0_8 A ADC0 analog input channel 8 17 39 39 17 25
ADC0_9 A ADC0 analog input channel 9 16 38 38
ADC0_10 A ADC0 analog input channel 10 15 37 37
ADC0_11 A ADC0 analog input channel 11 14 36 36
ADC0_12 A ADC0 analog input channel 12 11 33 33 14 22
ADC0_13 A ADC0 analog input channel 13 10 32 32 13 21
ADC0_14 A ADC0 analog input channel 14 9 31 31 12
ADC0_15 A ADC0 analog input channel 15 8 30 30 11
ADC0_16 A ADC0 analog input channel 16 7 29 29 21
ADC0_17 A ADC0 analog input channel 17 6 28 28 20
ADC0_18 A ADC0 analog input channel 18 5 27 27 19
ADC0_19 A ADC0 analog input channel 19 4 26 26 18
ADC0_20 A ADC0 analog input channel 20 3 25 25 17
ADC0_21 A ADC0 analog input channel 21 2 24 24 16
ADC0_22 A ADC0 analog input channel 22 29
ADC0_23 A ADC0 analog input channel 23 28
ADC0_24 A ADC0 analog input channel 24 21
ADC0_25 A ADC0 analog input channel 25 20