SBOS054B January   1995  – September 2015 OPA132 , OPA2132 , OPA4132

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Electrical Characteristics
    5. 6.5 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Operating Voltage
      2. 8.1.2 Offset Voltage Trim
      3. 8.1.3 Input Bias Current
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 WEBENCH Filter Designer Tool
        2. 11.1.1.2 TINA-TI (Free Software Download)
        3. 11.1.1.3 TI Precision Designs
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Links
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
Supply voltage, V+ to V– 36 V
Input voltage (V–) –0.7 (V+) +0.7 V
Output short-circuit(2) Continuous
Operation temperature –40 125 °C
Junction temperature 150 °C
Tstg Storage temperature –55 125 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Short-circuit to ground, one amplifier per package.

6.2 ESD Ratings

VALUE UNIT
OPA132 in PDIP and SOIC Package, OPA2132 and OPA4132 in PDIP Package
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
OPA2132 in SOIC Package
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500
OPA4132 in SOIC Package
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±200
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VS Supply voltage, VS = (V+) – (V–) ±2.5 ±15 ±18 V
TA Specified temperature range –40 85 °C

6.4 Electrical Characteristics

At TA = 25°C, VS = ±15 V, unless otherwise noted.
PARAMETER TEST CONDITIONS OPAx132P, U
OPA2132P, U		 OPAx132PA, UA
OPA2132PA, UA
OPA4132PA, UA		 UNIT
MIN TYP MAX MIN TYP MAX
OFFSET VOLTAGE
Input Offset Voltage ±0.25 ±0.5 ±0.5 ±2 mV
vs Temperature(1) Operating temperature range ±2 ±10 ±2 ±10 µV/°C
vs Power Supply VS = ±2.5 V to ±18 V 5 15 5 30 µV/V
Channel Separation (dual and quad) RL = 2 kΩ 0.2 0.2 µV/V
INPUT BIAS CURRENT
Input Bias Current(2) VCM = 0 V 5 ±50 5 ±50 pA
vs Temperature See Figure 5 See Figure 5
Input Offset Current(2) VCM = 0 V ±2 ±50 ±2 ±50 pA
NOISE
Input Voltage Noise
Noise Density f = 10 Hz 23 23 nV/√Hz
f = 100 H 10 10
f = 1 kHz 8 8
f = 10 kHz 8 8
Current Noise
Density,		 f = 1 kHz 3 3 fA/√Hz
INPUT VOLTAGE RANGE
Common-Mode Voltage Range (V–)
+2.5		 ±13 (V+)
–2.5		 (V–)
+2.5		 ±13 (V+)
–2.5		 V
Common-Mode Rejection VCM = –12.5 V to 12.5 V 96 100 86 94 dB
INPUT IMPEDANCE
Differential 1013 || 2 1013 || 2 Ω || pF
Common-Mode VCM = –12.5 V to 12.5 V 1013 || 6 1013 || 6 Ω || pF
OPEN-LOOP GAIN
Open-Loop Voltage Gain RL = 10 kΩ, VO = –14.5 V
to 13.8 V 		110 120 104 120 dB
RL = 2 kΩ, VO = –13.8 V
to 13.5 V		 110 126 104 120
RL = 600 Ω, VO = –12.8 V
to 12.5 V		 110 130 104 120
FREQUENCY RESPONSE
Gain-Bandwidth Product 8 8 MHz
Slew Rate ±20 ±20 V/µs
Settling Time: 0.1% G = –1, 10 V Step,
CL = 100 pF 		0.7 0.7 µs
0.01% G = –1, 10 V Step,
CL = 100 pF		 1 1 µs
Overload Recovery Time G = ± 0.5 0.5 µs
Total Harmonic Distortion + Noise 1 kHz, G = 1,
VO = 3.5 Vrms		 RL = 2 kΩ 0.00008% 0.00008%
RL = 600 Ω 0.00009% 0.00009%
OUTPUT
Voltage Output Positive RL = 10 kΩ (V+)
–1.2 		(V+)
–0.9 		(V+)
–1.2 		(V+)
–0.9 		V
Negative (V–)
+0.5		 (V–)
+0.3		 (V–)
+0.5		 (V–)
+0.3
Positive RL= 2 kΩ (V+)
–1.5		 (V+)
–1.1		 (V+)
–1.5		 (V+)
–1.1
Negative (V–)
+1.2		 (V–)
+0.9		 (V–)
+1.2		 (V–)
+0.9
Positive RL = 600 Ω (V+)
–2.5		 (V+)
–2.0		 (V+)
–2.5		 (V+)
–2.0
Negative (V–)
+2.2		 (V–)
+1.5		 (V–)
+2.2		 (V–)
+1.5
Short-Circuit Current ±40 ±40 mA
Capacitive Load Drive (Stable Operation) See Figure 17 See Figure 17
POWER SUPPLY
Specified Operating Voltage ±15 ±15 V
Operating Voltage Range ±2.5 ±18 ±2.5 ±18 V
Quiescent Current
(per amplifier)		 IO = 0 ±4 ±4.8 ±4 ±4.8 mA
TEMPERATURE RANGE
Operating Range –40 85 –40 85 °C
Storage –40 125 –40 125 °C
(1) Specified by wafer test.
(2) High-speed test at TJ = 25°C.

6.5 Typical Characteristics

At TA = 25°C, VS = ±15 V, RL = 2 kΩ, unless otherwise noted.
OPA132 OPA2132 OPA4132 typ_perf_curv_01_olgp_v_f_sbos054.gif
Figure 1. Open-Loop Gain and Phase vs Frequency
OPA132 OPA2132 OPA4132 typ_perf_curv_03_ivacnsd_v_f_sbos054.gif
Figure 3. Input Voltage and Current Noise Spectral Density vs Frequency
OPA132 OPA2132 OPA4132 typ_perf_curv_05_ibc_v_t_sbos054.gif
Figure 5. Input Bias Current vs Temperature
OPA132 OPA2132 OPA4132 typ_perf_curv_07_aolcmrpsr_v_t_sbos054.gif
Figure 7. AOL, CMR, PSR vs Temperature
OPA132 OPA2132 OPA4132 typ_perf_curv_09_ovpd_sbos054.gif
Figure 9. Offset Voltage Production Distribution
OPA132 OPA2132 OPA4132 typ_perf_curv_11_thdn_v_f_sbos054.gif
Figure 11. Total Harmonic Distortion + Noise vs Frequency
OPA132 OPA2132 OPA4132 typ_perf_curv_13_sssr_sbos054.gif
G = 1 CL = 100pF
Figure 13. Small-Signal Step Response
OPA132 OPA2132 OPA4132 typ_perf_curv_15_st_v_clg_sbos054.gif
Figure 15. Settling Time vs Closed-Loop Gain
OPA132 OPA2132 OPA4132 typ_perf_curv_17_ovs_v_oc_sbos054.gif
Figure 17. Output Voltage Swing vs Output Current
OPA132 OPA2132 OPA4132 typ_perf_curv_02_psacmr_v_f_sbos054.gif
Figure 2. Power Supply and Common-Mode Rejection vs Frequency
OPA132 OPA2132 OPA4132 typ_perf_curv_04_cs_v_f_sbos054.gif
Figure 4. Channel Separation vs Frequency
OPA132 OPA2132 OPA4132 typ_perf_curv_06_ibc_v_icmv_sbos054.gif
Figure 6. Input Bias Current vs Input Common-Mode Voltage
OPA132 OPA2132 OPA4132 typ_perf_curv_08_qcascc_v_t_sbos054.gif
Figure 8. Quiescent Current and Short-Circuit Current vs Temperature
OPA132 OPA2132 OPA4132 typ_perf_curv_10_ovdpd_sbos054.gif
Figure 10. Offset Voltage Drift Production Distribution
OPA132 OPA2132 OPA4132 typ_perf_curv_12_mov_v_f_sbos054.gif
Figure 12. Maximum Output Voltage vs Frequency
OPA132 OPA2132 OPA4132 typ_perf_curv_14_lssr_sbos054.gif
G = 1 CL = 100pF
Figure 14. Large-Signal Step Response
OPA132 OPA2132 OPA4132 typ_perf_curv_16_sso_v_lc_sbos054.gif
Figure 16. Small-Signal Overshoot vs Load Capacitance