at VS = ±18 V, TA = 25°C, VVOCM = VVICM = 0 V, RF = 2 kΩ, RL = 10 kΩ, VOUT = 2 VPP, G = 1 V/V, and V
PD = VS+ (unless otherwise noted)
Figure 6-1 Input-Referred Voltage Noise vs Frequency
| VOUT = 3 VRMS, VS
= ±15 V |
Figure 6-3 Total
Harmonic Distortion + Noise vs Frequency
Figure 6-5 Open Loop Gain vs Frequency
Figure 6-7 Common Mode Rejection Ratio vs Frequency
Figure 6-9 Power Supply Rejection Ratio vs Frequency
Figure 6-11 Maximum Output Voltage vs Frequency
Figure 6-13 Input Offset Voltage Histogram
Figure 6-15 Input Offset Voltage Drift Histogram
Figure 6-17 Output Common Mode Voltage Offset
Figure 6-19 Quiescent Current vs Temperature
Figure 6-21 Input Offset Voltage vs Input Common-Mode Voltage
Figure 6-23 Input Bias Current vs Supply Voltage
Figure 6-25 Output Voltage vs Output Current
Figure 6-27 Small-Signal Overshoot vs Capacitive Load
Figure 6-29 Output Slew Rate vs Supply Voltage
Figure 6-31 Large-Signal Step Response
Figure 6-33 Output Common-Mode Step Response, Falling
Figure 6-35 Small-Signal Step Response, Rising
Figure 6-37 Power-Down Time (PD Low to High)
Figure 6-39 Output Negative Overload Recovery
Figure 6-2 Current Noise vs Frequency
Figure 6-4 Total Harmonic Noise + Distortion vs Amplitude
Figure 6-6 Closed-Loop Gain vs Frequency
Figure 6-8 Common Mode Rejection Ratio vs Temperature
Figure 6-10 Power Supply Rejection Ratio vs Temperature
Figure 6-12 Output Impedance vs Frequency
Figure 6-14 Input Offset Voltage Histogram
| VS = ±18 V, VOCM = floating |
Figure 6-18 Quiescent Current vs Supply Voltage
Figure 6-20 Quiescent Current vs Power-Down Delta from Supply Voltage
Figure 6-22 Input Bias Current vs Input Common-Mode Voltage
Figure 6-24 Output Voltage vs Output Current
Figure 6-26 Open-Loop Gain vs Ouput Delta From Supply
Figure 6-28 Small-Signal Overshoot vs Capacitive Load
Figure 6-30 Short-Circuit Current vs Temperature
Figure 6-32 Output Common-Mode Step Response, Rising
Figure 6-34 Small-Signal Step Response, Falling
Figure 6-36 Output Settling Time to ±0.01%
Figure 6-38 Power-Down Time (PD High to Low)
Figure 6-40 Output Positive Overload Recovery