SBOS926G Data sheet

SBOS926G January 2021 – April 2024 OPA2392 , OPA392

PRODMIX

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)

DBV|5
YBJ|6

Thermal pad, mechanical data (Package|Pins)

Orderable Information

6.7 Typical Characteristics

at T_A = 25°C, V_S = 5.5 V, V_CM = V_S / 2, R_LOAD = 10 kΩ connected to V_S / 2, and C_L = 100 pF (unless otherwise noted)

V_S = 5.0 V

Figure 6-1 Offset Voltage Distribution

V_S = 5.0 V

Figure 6-3 Offset Voltage Distribution

Figure 6-5 Offset Voltage vs Common-Mode Voltage

Figure 6-7 Quiescent Current Distribution

Figure 6-9 Open-Loop Gain and Phase vs Frequency

V_S = 1.7 V

Figure 6-11 Input Bias Current vs Common-Mode Voltage

Figure 6-13 Input Bias Current vs Common-Mode Voltage

Figure 6-15 Output Voltage Swing vs Output Current (Sourcing)

V_S = ±0.85 V

Figure 6-17 Output Voltage Swing vs Output Current (Sourcing)

Figure 6-19 CMRR and PSRR vs Frequency

5 Units

Figure 6-21 PSRR vs Temperature

V_OUT = 1 V_RMS

Figure 6-23 THD+N Ratio vs Frequency

Figure 6-25 0.1-Hz to 10-Hz Noise

5 Units

Figure 6-27 Quiescent Current vs Temperature

Figure 6-29 Open-Loop Output Impedance vs Frequency

G = 1

Figure 6-31 Small-Signal Overshoot vs Capacitive Load (10‑mV Step)

Figure 6-33 Positive Overload Recovery

G = 1

Figure 6-35 Small-Signal Step Response (10-mV Step)

G = 1

Figure 6-37 Large-Signal Step Response (4-V Step)

Figure 6-39 Settling Time

V_S = 5.0 V, V_CM = 4.8 V

Figure 6-2 Offset Voltage Distribution

T_A = –40°C

Figure 6-4 Offset Voltage vs Common-Mode Voltage

T_A = +125°C

Figure 6-6 Offset Voltage vs Common-Mode Voltage

V_S = 1.7 V

Figure 6-8 Quiescent Current Distribution

Figure 6-10 Closed-Loop Gain vs Frequency

V_S = 3.3 V

Figure 6-12 Input Bias Current vs Common-Mode Voltage

Figure 6-14 Input Bias Current vs Temperature

Figure 6-16 Output Voltage Swing vs Output Current (Sinking)

V_S = ±0.85 V

Figure 6-18 Output Voltage Swing vs Output Current (Sinking)

5 Units

Figure 6-20 CMRR vs Temperature

Figure 6-22 Voltage Noise vs Frequency

f = 1 kHz

Figure 6-24 THD+N vs Output Amplitude

5 Units

Figure 6-26 Quiescent Current vs Supply Voltage

5 Units

Figure 6-28 Open-Loop Gain vs Temperature

G = –1

Figure 6-30 Small-Signal Overshoot vs Capacitive Load (10‑mV Step)

Figure 6-32 No Phase Reversal

Figure 6-34 Negative Overload Recovery

G = –1

Figure 6-36 Small-Signal Step Response (10-mV Step)

G = –1

Figure 6-38 Large-Signal Step Response (4-V Step)

P_RF = –10 dBm

Figure 6-40 EMIRR vs Frequency