SBOS556D June 2011 – August 2020 OPA171-Q1 , OPA2171-Q1 , OPA4171-Q1
PRODUCTION DATA
VS = ±18 V, VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2, and CL = 100 pF (unless otherwise noted)
| DESCRIPTION | FIGURE |
|---|---|
| Offset Voltage Production Distribution | Figure 6-1 |
| Offset Voltage Drift Distribution | Figure 6-2 |
| Offset Voltage vs Temperature | Figure 6-3 |
| Offset Voltage vs Common-Mode Voltage | Figure 6-4 |
| Offset Voltage vs Common-Mode Voltage (Upper Stage) | Figure 6-5 |
| Offset Voltage vs Power Supply | Figure 6-6 |
| IB and IOS vs Common-Mode Voltage | Figure 6-7 |
| Input Bias Current vs Temperature | Figure 6-8 |
| Output Voltage Swing vs Output Current (Maximum Supply) | Figure 6-9 |
| CMRR and PSRR vs Frequency (Referred-to Input) | Figure 6-10 |
| CMRR vs Temperature | Figure 6-11 |
| PSRR vs Temperature | Figure 6-12 |
| 0.1Hz to 10Hz Noise | Figure 6-13 |
| Input Voltage Noise Spectral Density vs Frequency | Figure 6-14 |
| THD+N Ratio vs Frequency | Figure 6-15 |
| THD+N vs Output Amplitude | Figure 6-16 |
| Quiescent Current vs Temperature | Figure 6-17 |
| Quiescent Current vs Supply Voltage | Figure 6-18 |
| Open-Loop Gain and Phase vs Frequency | Figure 6-19 |
| Closed-Loop Gain vs Frequency | Figure 6-20 |
| Open-Loop Gain vs Temperature | Figure 6-21 |
| Open-Loop Output Impedance vs Frequency | Figure 6-22 |
| Small-Signal Overshoot vs Capacitive Load (100-mV Output Step) | Figure 6-23, Figure 6-24 |
| No Phase Reversal | Figure 6-25 |
| Positive Overload Recovery | Figure 6-26 |
| Negative Overload Recovery | Figure 6-27 |
| Small-Signal Step Response (100 mV) | Figure 6-28, Figure 6-29 |
| Large-Signal Step Response | Figure 6-30, Figure 6-31 |
| Large-Signal Settling Time (10-V Positive Step) | Figure 6-32 |
| Large-Signal Settling Time (10-V Negative Step) | Figure 6-33 |
| Short-Circuit Current vs Temperature | Figure 6-34 |
| Maximum Output Voltage vs Frequency | Figure 6-35 |
| Channel Separation vs Frequency | Figure 6-36 |