SBOS165A September   2000  – October 2015 OPA627 , OPA637


  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Offset Voltage Adjustment
      2. 7.3.2 Noise Performance
      3. 7.3.3 Input Bias Current
      4. 7.3.4 Phase-Reversal Protection
      5. 7.3.5 Output Overload
      6. 7.3.6 Capacitive Loads
      7. 7.3.7 Input Protection
      8. 7.3.8 EMI Rejection Ratio (EMIRR)
        1. EMIRR IN+ Test Configuration
    4. 7.4 Settling Time
    5. 7.5 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. TINA-TI (Free Software Download)
        2. TI Precision Designs
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Links
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Detailed Description

7.1 Overview

The OPA6x7 Difet operational amplifiers provide a new level of performance in a precision FET operational amplifier. When compared to the popular OPA111 operational amplifier, the OPA6x7 has lower noise, lower offset voltage, and higher speed. The OPA6x7 is useful in a broad range of precision and high speed analog circuitry.

The OPA6x7 is fabricated on a high-speed, dielectrically-isolated complementary NPN/PNP process. It operates over a wide range of power supply voltage of ±4.5 V to ±18 V. Laser-trimmed Difet input circuitry provides high accuracy and low-noise performance comparable with the best bipolar-input operational amplifiers.

High frequency complementary transistors allow increased circuit bandwidth, attaining dynamic performance not possible with previous precision FET operational amplifiers. The OPA627 is unity-gain stable. The OPA637 is stable in gains equal to or greater than five.

Difet fabrication achieves extremely low input bias currents without compromising input voltage noise performance. Low input bias current is maintained over a wide input common-mode voltage range with unique cascode circuitry.

The OPA6x7 is available in plastic PDIP, SOIC, and metal TO-99 packages. Industrial and military temperature range models are available.

7.2 Functional Block Diagram

OPA627 OPA637 sbos165_sch.gif

7.3 Feature Description

The OPA627 is unity-gain stable. The OPA637 may achieve higher speed and bandwidth in circuits with noise gain greater than five. Noise gain refers to the closed-loop gain of a circuit, as if the noninverting operational amplifier input were being driven. For example, the OPA637 may be used in a noninverting amplifier with gain greater than five, or an inverting amplifier of gain greater than four.

When choosing between the OPA627 or OPA637, consider the high frequency noise gain of your circuit configuration. Circuits with a feedback capacitor (see Figure 27) place the operational amplifier in unity noise-gain at high frequency. These applications must use the OPA627 for proper stability. An exception is the circuit in Figure 28, where a small feedback capacitance is used to compensate for the input capacitance at the inverting input of the operational amplifier. In this case, the closed-loop noise gain remains constant with frequency, so if the closed-loop gain is equal to five or greater, the OPA637 may be used.

OPA627 OPA637 circuits_noise_gain_less_5.gif Figure 27. Circuits With Noise Gain Less Than Five Require the OPA627 for Proper Stability
OPA627 OPA637 circuits_noise_gain_eq_or_greater_5.gif Figure 28. Circuits With Noise Gain Equal to or Greater Than Five May Use the OPA637

7.3.1 Offset Voltage Adjustment

The OPA6x7 is laser-trimmed for low offset voltage and drift, so many circuits will not require external adjustment. Figure 29 shows the optional connection of an external potentiometer to adjust offset voltage. This adjustment should not be used to compensate for offsets created elsewhere in a system (such as in later amplification stages or in an A/D converter), because this could introduce excessive temperature drift. Generally, the offset drift will change by approximately 4 µV/°C for 1 mV of change in the offset voltage due to an offset adjustment (as shown in Figure 29).

OPA627 OPA637 opt_offset_volt_trim.gif Figure 29. Optional Offset Voltage Trim Circuit

7.3.2 Noise Performance

Some bipolar operational amplifiers may provide lower voltage noise performance, but both voltage noise and bias current noise contribute to the total noise of a system. The OPA6x7 provides both low voltage noise and low current noise. This provides optimum noise performance over a wide range of sources, including reactive-source impedances. This can be seen in the performance curve showing the noise of a source resistor combined with the noise of an OPA627. Above a 2-kΩ source resistance, the operational amplifier contributes little additional noise. Below 1 kΩ, operational amplifier noise dominates over the resistor noise, but compares favorably with precision bipolar operational amplifiers.

7.3.3 Input Bias Current

Difet fabrication of the OPA6x7 provides low input bias current. Because the gate current of a FET doubles approximately every 10°C, to achieve lowest input bias current, keep the die temperature as low as possible. The high speed, and therefore higher quiescent current, of the OPA6x7 can lead to higher chip temperature. A simple press-on heat sink such as the Burr-Brown model 807HS (TO-99 metal package) can reduce chip temperature by approximately 15°C, lowering the IB to one-third its warmed-up value. The 807HS heat sink can also reduce low-frequency voltage noise caused by air currents and thermoelectric effects. See the data sheet on the 807HS for details.

Temperature rise in the plastic PDIP and SOIC packages can be minimized by soldering the device to the circuit board. Wide copper traces also help dissipate heat.

The OPA6x7 may also be operated at reduced power supply voltage, to minimize power dissipation and temperature rise. Using ±5-V power supplies reduces power dissipation to one-third of that at ±15 V. This reduces the IB of TO- 99 metal package devices to approximately one-fourth the value at ±15 V.

Leakage currents between printed-circuit-board traces can easily exceed the input bias current of the OPA6x7. A circuit board guard pattern (see Figure 30) reduces leakage effects. By surrounding critical high impedance input circuitry with a low impedance circuit connection at the same potential, leakage current will flow harmlessly to the low-impedance node. The case (TO-99 metal package only) is internally connected to –VS.

Input bias current may also be degraded by improper handling or cleaning. Contamination from handling parts and circuit boards may be removed with cleaning solvents and deionized water. Each rinsing operation should be followed by a 30-minute bake at 85°C.

Many FET-input operational amplifiers exhibit large changes in input bias current with changes in input voltage. Input stage cascode circuitry makes the input bias current of the OPA6x7 virtually constant with wide common-mode voltage changes. This is ideal for accurate, high input-impedance buffer applications.

OPA627 OPA637 conn_input_guard_low_ib.gif Figure 30. Connection of Input Guard for Lowest IB

7.3.4 Phase-Reversal Protection

The OPA6x7 has internal phase-reversal protection. Many FET-input operational amplifiers exhibit a phase reversal when the input is driven beyond its linear common-mode range. This is most often encountered in noninverting circuits when the input is driven below –12 V, causing the output to reverse into the positive rail. The input circuitry of the OPA6x7 does not induce phase reversal with excessive common-mode voltage, so the output limits into the appropriate rail.

7.3.5 Output Overload

When the inputs to the OPA6x7 are overdriven, the output voltage of the OPA6x7 smoothly limits at approximately 2.5 V from the positive and negative power supplies. If driven to the negative swing limit, recovery takes approximately 500 ns. When the output is driven into the positive limit, recovery takes approximately 6 µs. Output recovery of the OPA627 can be improved using the output clamp circuit shown in Figure 31. Placing diodes at the inverting input prevent degradation of input bias current.

OPA627 OPA637 clamp_circ_impr_overload_rec.gif Figure 31. Clamp Circuit for Improved Overload Recovery

7.3.6 Capacitive Loads

As with any high-speed operational amplifier, best dynamic performance can be achieved by minimizing the capacitive load. Because a load capacitance presents a decreasing impedance at higher frequency, a load capacitance which is easily driven by a slow operational amplifier can cause a high-speed operational amplifier to perform poorly. See the typical curves showing settling times as a function of capacitive load. The lower bandwidth of the OPA627 makes it the better choice for driving large capacitive loads. Figure 32 shows a circuit for driving very large load capacitance. The two-pole response of this circuit can also be used to sharply limit system bandwidth, often useful in reducing the noise of systems which do not require the full bandwidth of the OPA627.

OPA627 OPA637 driv_large_capac_loads.gif Figure 32. Driving Large Capacitive Loads

7.3.7 Input Protection

The inputs of the OPA6x7 are protected for voltages from +VS + 2 V to –VS – 2 V. If the input voltage can exceed these limits, the amplifier should be protected. The diode clamps shown in (a) in Figure 33 prevent the input voltage from exceeding one forward diode voltage drop beyond the power supplies, which is well within the safe limits. If the input source can deliver current in excess of the maximum forward current of the protection diodes, use a series resistor, RS, to limit the current. Be aware that adding resistance to the input increases noise. The 4-nV/√Hz theoretical thermal noise of a 1-kΩ resistor will add to the 4.5-nV/√Hz noise of the OPA6x7 (by the square-root of the sum of the squares), producing a total noise of 6 nV/√Hz. Resistors less than 100 Ω add negligible noise.

Leakage current in the protection diodes can increase the total input bias current of the circuit. The specified maximum leakage current for commonly used diodes such as the 1N4148 is approximately 25 nA, more than a thousand times larger than the input bias current of the OPA6x7. Leakage current of these diodes is typically much lower and may be adequate in many applications. Light falling on the junction of the protection diodes can dramatically increase leakage current, so common glass-packaged diodes should be shielded from ambient light. Very low leakage can be achieved by using a diode-connected FET as shown. The 2N4117A is specified at 1 pA and its metal case shields the junction from light.

Sometimes input protection is required on I/V converters of inverting amplifiers; see (b) in Figure 33. Although in normal operation, the voltage at the summing junction will be near zero (equal to the offset voltage of the amplifier), and large input transients may cause this node to exceed 2 V beyond the power supplies. In this case, the summing junction should be protected with diode clamps connected to ground. Even with the low voltage present at the summing junction, common signal diodes may have excessive leakage current. Because the reverse voltage on these diodes is clamped, a diode-connected signal transistor can act as an inexpensive low leakage diode; see (b) in Figure 33.

OPA627 OPA637 input_prot_circ.gif Figure 33. Input Protection Circuits

7.3.8 EMI Rejection Ratio (EMIRR)

The electromagnetic interference (EMI) rejection ratio, or EMIRR, describes the EMI immunity of operational amplifiers. An adverse effect that is common to many operational amplifiers is a change in the offset voltage as a result of RF signal rectification. An operational amplifier that is more efficient at rejecting this change in offset as a result of EMI has a higher EMIRR and is quantified by a decibel value. Measuring EMIRR can be performed in many ways, but this report provides the EMIRR IN+, which specifically describes the EMIRR performance when the RF signal is applied to the noninverting input pin of the operational amplifier. In general, only the noninverting input is tested for EMIRR for the following three reasons:

  • Operational amplifier input pins are known to be the most sensitive to EMI, and typically rectify RF signals better than the supply or output pins.
  • The noninverting and inverting operational amplifier inputs have symmetrical physical layouts and exhibit nearly matching EMIRR performance.
  • EMIRR is easier to measure on noninverting pins than on other pins because the noninverting input terminal can be isolated on a printed-circuit-board (PCB). This isolation allows the RF signal to be applied directly to the noninverting input terminal with no complex interactions from other components or connecting PCB traces.

A more formal discussion of the EMIRR IN+ definition and test method is provided in application report EMI Rejection Ratio of Operational Amplifiers (SBOA128), available for download at

The EMIRR IN+ of the OPA627 is plotted versus frequency as shown in Figure 34. If available, any dual and quad operational amplifier device versions have nearly similar EMIRR IN+ performance. The OPA627 unity-gain bandwidth is 16 MHz. EMIRR performance below this frequency denotes interfering signals that fall within the operational amplifier bandwidth.

OPA627 OPA637 D100_sbos165.gif Figure 34. OPA627 EMIRR IN+ vs Frequency

Table 1 shows the EMIRR IN+ values for the OPA627 at particular frequencies commonly encountered in real-world applications. Applications listed in Table 1 may be centered on or operated near the particular frequency shown. This information may be of special interest to designers working with these types of applications, or working in other fields likely to encounter RF interference from broad sources, such as the industrial, scientific, and medical (ISM) radio band.

Table 1. OPA627 EMIRR IN+ for Frequencies of Interest

400 MHz Mobile radio, mobile satellite/space operation, weather, radar, UHF 46.2 dB
900 MHz GSM, radio com/nav./GPS (to 1.6 GHz), ISM, aeronautical mobile, UHF 60.3 dB
1.8 GHz GSM, mobile personal comm. broadband, satellite, L-band 81 dB
2.4 GHz 802.11b/g/n, Bluetooth™, mobile personal comm., ISM, amateur radio/satellite, S-band 96.9 dB
3.6 GHz Radiolocation, aero comm./nav., satellite, mobile, S-band 108.9 dB
5 Ghz 802.11a/n, aero comm./nav., mobile comm., space/satellite operation, C-band 116.8 dB EMIRR IN+ Test Configuration

Figure 35 shows the circuit configuration for testing the EMIRR IN+. An RF source is connected to the operational amplifier noninverting input terminal using a transmission line. The operational amplifier is configured in a unity gain buffer topology with the output connected to a low-pass filter (LPF) and a digital multimeter (DMM). A large impedance mismatch at the operational amplifier input causes a voltage reflection; however, this effect is characterized and accounted for when determining the EMIRR IN+. The resulting DC offset voltage is sampled and measured by the multimeter. The LPF isolates the multimeter from residual RF signals that may interfere with multimeter accuracy. Refer to SBOA128 for more details.

OPA627 OPA637 EMIRR_Test_CKT_SBOS165.gif Figure 35. EMIRR IN+ Test Configuration Schematic

7.4 Settling Time

The OPA627 and OPA637 have fast settling times, as low as 300 ns. Figure 36 illustrates the circuit used to measure settling time for the OPA627 and OPA637.

OPA627 OPA637 settling_time_slew_rate_test.gif Figure 36. Settling Time and Slew Rate Test Circuit

7.5 Device Functional Modes

The OPA627 and OPA6377 have a single functional mode and are operational when the power-supply voltage is greater than 9V (±4.5 V). The maximum power supply voltage for the OPA627 and OPA637 are 36 V (±18 V).