SBOS165A September   2000  – October 2015 OPA627 , OPA637

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Offset Voltage Adjustment
      2. 7.3.2 Noise Performance
      3. 7.3.3 Input Bias Current
      4. 7.3.4 Phase-Reversal Protection
      5. 7.3.5 Output Overload
      6. 7.3.6 Capacitive Loads
      7. 7.3.7 Input Protection
      8. 7.3.8 EMI Rejection Ratio (EMIRR)
        1. 7.3.8.1 EMIRR IN+ Test Configuration
    4. 7.4 Settling Time
    5. 7.5 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 TINA-TI (Free Software Download)
        2. 11.1.1.2 TI Precision Designs
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Links
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
Supply Voltage ±18 V
Input Voltage Range +VS + 2 –VS – 2 V
Differential Input Total VS + 4 V
Power Dissipation 1000 mW
Operating Temperature LMC Package –55 125 °C
P, D Package –40 125
Junction Temperature LMC Package 175 °C
P, D Package 150
Storage temperature, Tstg LMC Package –65 150 °C
P, D Package –40 125
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

VALUE UNIT
OPA627 and OPA637 in PDIP and SOIC Packages
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2500 V
OPA627 and OPA637 in SOIC Packages
V(ESD) Electrostatic discharge Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000 V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
Supply voltage, Vs = (V+) - (V-) 9 (±4.5) 30 (±15) 36 (±18) V
Specified temperature P and D packages –25 25 85 °C
LMC package –55 25 125 °C

6.4 Thermal Information

THERMAL METRIC(1) OPA627, OPA637 UNIT
P (DIP) D (SOIC) LMC (TO-99)
8 PINS 8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 46.2 107.9 200 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 34.5 57.3 °C/W
RθJB Junction-to-board thermal resistance 23.5 49.7 °C/W
ψJT Junction-to-top characterization parameter 11.7 11.7 °C/W
ψJB Junction-to-board characterization parameter 23.3 48.9 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

At TA = 25°C, and VS = ±15 V, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE(1)
Input offset voltage BM, SM grades 40 100 µV
AM grade 130 250
BP grade 100 250
AP, AU grades 280 500
Average drift BM, SM grades 0.4 0.8 µV/°C
AM grade 1.2 2
BP grade 0.8 2
AP, AU grades 2.5
Power supply rejection VS = ±4.5 to ±18 V BM, BP, SM grades 106 120 dB
AM, AP, AU grades 100 116
INPUT BIAS CURRENT(2)
Input bias current VCM = 0 V TA = 25°C BM, BP, SM grades 1 5 pA
AM, AP, AU grades 2 10
Over specified temperature BM, BP grades 1 nA
SM grade 50
AM, AP, AU grades 2
VCM = ±10 V, over common-mode voltage BM, BP, SM grades 1 pA
AM, AP, AU grades 2
Input offset current VCM = 0 V TA = 25°C BM, BP, SM grades 0.5 5 pA
AM, AP, AU grades 1 10
Over specified temperature BM, BP grades 1 nA
SM grade 50
AM, AP, AU grades 2
NOISE
Input voltage noise density f = 10 Hz BM, BP, SM grades 15 40 nV/√Hz
AM, AP, AU grades 20
f = 100 Hz BM, BP, SM grades 8 20
AM, AP, AU grades 10
f = 1 kHz BM, BP, SM grades 5.2 8
AM, AP, AU grades 5.6
f = 10 kHz BM, BP, SM grades 4.5 6
AM, AP, AU grades 4.8
Input voltage noise BW = 0.1 Hz to 10 Hz BM, BP, SM grades 0.6 1.6 µVp-p
AM, AP, AU grades 0.8
Input bias-current noise density f = 100 Hz BM, BP, SM grades 1.6 2.5 fA/√Hz
AM, AP, AU grades 2.5
Input bias-current noise BW = 0.1 Hz to 10 Hz BM, BP, SM grades 30 60 fAp-p
AM, AP, AU grades 48
INPUT IMPEDANCE
Differential 1013 || 8 Ω || pF
Common-mode 1013 || 7 Ω || pF
INPUT VOLTAGE RANGE
Common-mode input range TA = 25°C ±11 ±11.5 V
Over specified temperature ±10.5 ±11
Common-mode rejection VCM = ±10.5 V BM, BP, SM grades 106 116 dB
AM, AP, AU grades 100 110
OPEN-LOOP GAIN
Open-loop voltage gain VO = ±10 V, RL = 1kΩ TA = 25°C BM, BP, SM grades 112 120 dB
AM, AP, AU grades 106 116
Over specified temperature BM, BP grades 106 117
SM grade 100 114
AM, AP, AU grades 100 110
FREQUENCY RESPONSE
Slew rate G = –1, 10-V step, OPA627 40 55 V/µs
G = –4, 10-V step, OPA637 100 135
Settling time G = –1, 10-V step, OPA627 0.01% 550 ns
0.1% 450
G = –4, 10-V step, OPA637 0.01% 450
0.1% 300
Gain-bandwidth product G = 1, OPA627 16 MHz
G = 10, OPA637 80
Total harmonic distortion + noise G = 1, f = 1 kHz 0.00003%
POWER SUPPLY
Specified operating voltage ±15 V
Operating voltage range ±4.5 ±18 V
Current ±7 ±7.5 mA
OUTPUT
Voltage output RL = 1 kΩ ±11.5 ±12.3 V
Over specified temperature ±11 ±11.5
Current output VO = ±10 V ±45 mA
Short-circuit current ±35 ±70/–55 ±100 mA
Output impedance, open-loop 1 MHz 55 Ω
TEMPERATURE RANGE
Temperature range specification AP, BP, AM, BM, AU grades –25 85 °C
SM grade –55 125
(1) Offset voltage measured fully warmed-up.
(2) High-speed test at TJ = 25°C. See Typical Characteristics for warmed-up performance.

6.6 Typical Characteristics

At TA = 25°C, and VS = ±15 V, unless otherwise noted.
OPA627 OPA637 sbos165_typchar_1.gif
Figure 1. Input Voltage Noise Spectral Density vs Frequency
OPA627 OPA637 sbos165_typchar_3.gif
Figure 3. Voltage Noise vs Source Resistance
OPA627 OPA637 sbos165_typchar_5.gif
Figure 5. OPA627 Gain/Phase vs Frequency
OPA627 OPA637 sbos165_typchar_7.gif
Figure 7. Open-Loop Gain vs Temperature
OPA627 OPA637 sbos165_typchar_9.gif
Figure 9. Common-Mode Rejection vs Frequency
OPA627 OPA637 sbos165_typchar_11.gif
Figure 11. Power-Supply Rejection vs Frequency
OPA627 OPA637 sbos165_typchar_13.gif
Figure 13. Supply Current vs Temperature
OPA627 OPA637 sbos165_typchar_15.gif
Figure 15. OPA627 Gain-Bandwidth and Slew Rate vs Temperature
OPA627 OPA637 sbos165_typchar_17.gif
Figure 17. OPA627 Total Harmonic Distortion + Noise vs Frequency
OPA627 OPA637 sbos165_typchar_19.gif
Figure 19. Input Bias and Offset Current vs Junction Temperature
OPA627 OPA637 sbos165_typchar_21.gif
Figure 21. Input Bias Current vs Common-Mode Voltage
OPA627 OPA637 sbos165_typchar_23.gif
Figure 23. Maximum Output Voltage vs Frequency
OPA627 OPA637 sbos165_typchar_25.gif
Figure 25. Settling Time vs Error Band
OPA627 OPA637 sbos165_typchar_2.gif
Figure 2. Total Input Voltage Noise vs Bandwidth
OPA627 OPA637 sbos165_typchar_4.gif
Figure 4. Open-Loop Gain vs Frequency
OPA627 OPA637 sbos165_typchar_6.gif
Figure 6. OPA637 Gain/Phase vs Frequency
OPA627 OPA637 sbos165_typchar_8.gif
Figure 8. Open-Loop Output Impedance vs Frequency
OPA627 OPA637 sbos165_typchar_10.gif
Figure 10. Common-Mode Rejection vs Input Common-Mode Voltage
OPA627 OPA637 sbos165_typchar_12.gif
Figure 12. Power-Supply Rejection and Common-Mode Rejection vs Temperature
OPA627 OPA637 sbos165_typchar_14.gif
Figure 14. Output Current Limit vs Temperature
OPA627 OPA637 sbos165_typchar_16.gif
Figure 16. OPA637 Gain-Bandwidth and Slew Rate vs Temperature
OPA627 OPA637 sbos165_typchar_18.gif
Figure 18. OPA637 Total Harmonic Distortion + Noise vs Frequency
OPA627 OPA637 sbos165_typchar_20.gif
Figure 20. Input Bias Current vs Power Supply Voltage
OPA627 OPA637 sbos165_typchar_22.gif
Figure 22. Input Offset Voltage Warm-up vs Time
OPA627 OPA637 sbos165_typchar_24.gif
Figure 24. Settling Time vs Closed-Loop Gain
OPA627 OPA637 sbos165_typchar_26.gif
Figure 26. Settling Time vs Load Capacitance