SBOS940A May   2019  – March 2020 OPA818

PRODUCTION DATA.  

  1. Features
  2. Applications
    1.     High-Speed Optical Front-End
  3. Description
    1.     Photodiode Capacitance vs 3-dB Bandwidth
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: VS = ±5 V
    6. 7.6 Typical Characteristics: VS = ±5 V
    7. 7.7 Typical Characteristics: VS = 6 V
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input and ESD Protection
      2. 8.3.2 Feedback Pin
      3. 8.3.3 Decompensated Architecture With Wide Gain-Bandwidth Product
      4. 8.3.4 Low Input Capacitance
    4. 8.4 Device Functional Modes
      1. 8.4.1 Split-Supply Operation (+4/–2 V to ±6.5 V)
      2. 8.4.2 Single-Supply Operation (6 V to 13 V)
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Wideband, Non-Inverting Operation
      2. 9.1.2 Wideband, Transimpedance Design Using OPA818
    2. 9.2 Typical Applications
      1. 9.2.1 High Bandwidth, 100-kΩ Gain Transimpedance Design
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Non-Inverting Gain of 2 V/V
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Thermal Considerations
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Input and ESD Protection

The OPA818 is built using a very high speed complementary bipolar process. The internal junction breakdown voltages are relatively low for these very small geometry devices. These breakdowns are reflected in the Absolute Maximum Ratings table. All device pins are protected with internal ESD protection diodes to the power supplies as shown in Figure 45.

These diodes provide moderate protection to input overdrive voltages beyond the supplies as well. The protection diodes can typically support 10-mA continuous current. Where higher currents are possible (for example, in systems with ±12-V supply parts driving into the OPA818), current limiting series resistors should be added in series with the two inputs to limit the current. Keep these resistor values as low as possible because high values degrade both noise performance and frequency response. There are no back-to-back ESD diodes between VIN+ and VIN–. As a result, the differential input voltage between VIN+ and VIN– is entirely absorbed by the VGS of the input JFET differential pair and must not exceed the voltage ratings shown in Absolute Maximum Ratings table.

OPA818 SBOS940_OPA818_esd.gifFigure 45. Internal ESD Protection