Achieving optimized performance with a high-frequency amplifier such as the OPA830 requires careful attention to board layout parasitics and external component types. Recommendations that optimize performance include:

1. Minimize parasitic capacitance to any ac ground for all of the signal I/O pins. Parasitic capacitance on the output and inverting input pins can cause instability: on the noninverting input, parasitic capacitance can react with the source impedance to cause unintentional bandlimiting. To reduce unwanted capacitance, open a window around the signal I/O pins in all of the ground and power planes around those pins. Otherwise, make sure that ground and power planes are unbroken elsewhere on the board.
2. Minimize the distance (< 0.25”) from the power-supply pins to high-frequency 0.1μF decoupling capacitors. At the device pins, do not place the ground and power-plane layout in close proximity to the signal I/O pins. Avoid narrow power and ground traces to minimize inductance between the pins and the decoupling capacitors. Always decouple each power-supply connection with one of these capacitors. An optional supply decoupling capacitor (0.1μF) across the two power supplies (for bipolar operation) improves 2nd-harmonic distortion performance. Use larger (2.2μF to 6.8μF) decoupling capacitors, effective at lower frequency, on the main supply pins. Place these capacitors somewhat farther from the device. These capacitors can be shared among several devices in the same area of the PCB.
3. Carefully select and place external components to preserve the high-frequency performance. Use very low reactance type resistors. Surface-mount resistors work best and allow a tighter overall layout. Metal film or carbon composition axially-leaded resistors can also provide good high-frequency performance. Again, keep the leads and PCB traces as short as possible. Never use wire-wound type resistors in a high-frequency application. The output pin and inverting input pin are the most sensitive to parasitic capacitance; therefore, always position the feedback and series output resistor, if any, as close as possible to the output pin. Place other network components, such as noninverting input termination resistors, close to the package. Where double-side component mounting is allowed, place the feedback resistor directly under the package on the other side of the board between the output and inverting input pins. Even with a low parasitic capacitance shunting the external resistors, excessively high resistor values can create significant time constants that can degrade performance. Good axial metal film or surface-mount resistors have approximately 0.2pF in shunt with the resistor. For resistor values > 1.5kΩ, this parasitic capacitance can add a pole, zero below 500MHz, or both, that can effect circuit operation. Keep resistor values as low as possible consistent with load driving considerations. The 750Ω feedback used in the Typical Characteristics is a good starting point for design.
4. Make connections to other wideband devices on the board with short direct traces or through onboard transmission lines. For short connections, consider the trace and the input to the next device as a lumped capacitive load. Use relatively wide traces (50mils to 100mils), preferably with ground and power planes opened up around them. Estimate the total capacitive load and set R_S from the typical characteristic curve Recommended R _S vs Capacitive Load. R_S is not always needed for low parasitic capacitive loads (< 5pF) because the OPA830 is nominally compensated to operate with a 2pF parasitic load. Higher parasitic capacitive loads without an R_S are allowed as the signal gain increases (increasing the unloaded phase margin). If a long trace is required, and the 6dB signal loss intrinsic to a doubly terminated transmission line is acceptable, implement a matched impedance transmission line using microstrip or stripline techniques (consult an ECL design handbook for microstrip and stripline layout techniques). A 50Ω environment is normally not necessary onboard, and in fact, a higher impedance environment improves distortion; see also the distortion versus load plots. With a characteristic board trace impedance defined (based on board material and trace dimensions), a matching series resistor into the trace from the output of the OPA830 is used as well as a terminating shunt resistor at the input of the destination device. Remember also that the terminating impedance is the parallel combination of the shunt resistor and the input impedance of the destination device; set this total effective impedance to match the trace impedance. If the 6dB attenuation of a doubly terminated transmission line is unacceptable, a long trace can be series-terminated at the source end only. Treat the trace as a capacitive load in this case and set the series resistor value as shown in the typical characteristic curve Recommended R _S vs Capacitive Load. This configuration does not preserve signal integrity as well as a doubly-terminated line. If the input impedance of the destination device is low, some signal attenuation occurs due to the voltage divider formed by the series output into the terminating impedance.
5. Do not socket a high-speed device. The additional lead length and pin-to-pin capacitance introduced by the socket can create an extremely troublesome parasitic network that can make achieving a smooth, stable frequency response almost impossible. Best results are obtained by soldering the OPA830 onto the board.