SLDS204B October 2014 – June 2020 PGA300
PRODUCTION DATA.
Figure 78 depicts the main guidelines previously discussed being implemented in a six-layer, socketed evaluation board (EVM) of the PGA300. Two main GND planes (layer 2 and 5) were used to provide a nearby GND plane to each of the signal layers and the power plane (layer 3) in the EVM. The EVM supports voltage and current output modes for the device, and as a result, GND separation is needed, depending on the application. As a result, layer 2 is a solid GND plane for the majority of the circuitry in the EVM (IRETURN). Because most of the circuitry is referred to this GND plane, layers 3 and 4 also contain copper pours connected to IRETURN. This GND plane is the return path for the supply used in the 4-mA to 20-mA loop. Layer 5 is a split plane for the ground references for the digital communication signals used for the EVM (USBGND) and the ground pins in the device (GND, AVSS and DVSS), referred to as ASICGND. The EVM provides jumpers to connect, or disconnect, these three planes one from another, depending on the desired configuration.
Figure 78 illustrates the recommended capacitors for proper operation of the PGA300. These capacitors are placed as close as possible to their respective pins of the socket used on the EVM. The signal traces for FB–, FB+, COMP, and OUT can also be observed to be routed all in the same layer to avoid crossing each other and minimize coupling.