SLASEC8B February 2017 – January 2019 PGA460-Q1
In the case where each 1-µs Data-Path sample is needed to be extracted for further analysis, the PGA460-Q1 device offers a Test Mode where the Raw Digital data can be extracted at different points in the Digital data path as shown in Figure 35. Data burst is enabled when DP_MUX value is greater than 0 and less than 5, then the object detection and measurement is disabled.
To enable this mode, the Digital Data-Path Mux can select the source signal to be burst out of the device by setting the DP_MUX parameter in the device memory. Once the DP_MUX parameter is enabled (set to a value other than 0x00), and if any of the SEND/RECEIVE, Receive Only or TEMPERATURE READ commands are issued using the standard UART command method, the selected source signal is passed through the Digital Multiplexer and Serialized by the 8/1 Serializer block. This signal is immediately outputted on the UART TXD pin that now acts as a data output pin, while the master sends clock pulses to the CLK pin.
It is important that after issuing any of these commands the master does not stop sending clock pulses on the CLK pin until the Bus is idle. Once a Checksum received is verified and the bus is idle, that is considered the end of the Burst data. This is needed for proper data synchronization in the PGA460-Q1 device. For further explanation on the USART Synchronous communication mode, see the USART Synchronous Mode section.
Figure 36 shows the format of the order of the data stream coming out of the PGA460-Q1 device.
As shown in Figure 36, the output data-stream starts with a PGA460-Q1 diagnostic data field, followed by number of data bytes and ends with a checksum field calculated on the diagnostic data byte and all data bytes. The number of data bytes depends on the number of samples extracted from the PGA460-Q1 device, which depends on the Recording Time Interval of the current command. The recording time Interval is determined by the P1_REC and P2_REC parameters in the EEPROM memory while the sampling rate of the ADC and digital signal path is 1 µs / Sample. From here it can be calculated that the number of samples is equivalent to the recording time when expressed in microseconds.
The digital output offers two modes of operation based on the SAMPLE_SEL parameter:
For both of the previously listed options, the nonlinear scaling block is only enabled if the data is extracted from the Low-Pass filter (DP_MUX = 0x1). In all other cases, the nonlinear scaling block is disabled.