SLASEC8B February 2017 – January 2019 PGA460-Q1
The PGA460-Q1 device implements a low-power mode where the current consumption is significantly reduced to preserve system power. The low-power mode feature is enabled by setting the LPM_EN bit in the EEPROM. If this bit is set, the PGA460-Q1 device goes into low-power mode after a certain period of inactivity as defined by the LPM_TMR bits in the FVOLT_DEC EEPROM register. Inactivity is defined when no activity occurs on the communication interfaces such as commands to BURST/LISTEN, LISTEN ONLY, or to configure the device. Any command causes a reset of the timer. During the programming of the EEPROM, the timer remains in reset.
In low-power mode the PGA460-Q1 device can wake up in two different ways based on the interface used for communication: time-command interface and USART interface. These ways are described in the following sections.