SLASEC8B February 2017 – January 2019 PGA460-Q1
Because the REGISTER READ command requires the master device to specify a register address in the PGA460-Q1 memory, an additional frame type is defined where the master issues the sync and command fields followed by the memory register address as the only byte field in the master frame and a master checksum as the last field. Following the master-to-slave transmission, the PGA460-Q1 device responds with a standard PGA460-Q1 Response Operation frame. Figure 28 shows this operation.
If a RESPONSE command arrives on the UART interface while another NO-RESPONSE command is also served or if the PGA460-Q1 device is busy performing functions, then the PGA460-Q1 device responds with a diagnostic field (see the Diagnostic Field section) having an error status of 0 which denotes that the device is busy serving functions. If the PGA460-Q1 is currently serving a RESPONSE command while another RESPONSE command arrives, then the PGA460-Q1 device ignores the new RESPONSE command until it is done serving the previous RESPONSE command.