SLASEC8B February 2017 – January 2019 PGA460-Q1
The PGA460-Q1 TEST pin serves multiple purposes including:
Internal signals on the TEST pin can be extracted by selecting a predefined signal through the internal test mux. The TEST_MUX register parameter is used to select this signal. Table 5 lists the possible PGA460-Q1 internal signals that are output at the TEST pin.
|TEST_MUX VALUE||SIGNAL NAME||TYPE||DESCRIPTION|
|0x00||Hi-Z (disabled)||Analog||The TEST pin is in the high impedance state|
|0x01||ASC Output||SAR ADC input after the ADC buffer|
|0x04||8MHz Clock||Digital||8-MHz clock output from PGA460-Q1|
|0x05||ADC Sample Clock||1-µs ADC sample Clock|
When used as an analog test-mux output, the TEST pin output voltage can change from 0 V to 1.8 V while the common mode voltage is set to 0.9 V.
The digital voltage-level selection performed by the TEST pin is executed at device power up. On power-up, the device checks the level of the TEST pin. If the level is low, the digital output pins operate at 3.3 V. If the TEST pin is tied high (3.3 V or 5 V are both considered high state), the digital output pins operate at a 5 V. This condition is latched in the PGA460-Q1 device so that the test mux can further use the TEST pin as previously described. If the application requires that a 5-V digital output is used and a test mux output must be extracted from the PGA460-Q1 device, then a weak pullup resistor on the TEST pin can be connected as shown in Figure 42.
As shown in Figure 42, the resistor (RPU) is connected to a permanent power supply and a current path to ground is generated through the RPU resistor and the 800-kΩ internal resistance. This configuration is no problem for the system; however, it might cause a small quiescent-current increase in applications that require the use of the PGA460-Q1 low-power mode to preserve energy. In this case, the TEST pin can be connected to a GPIO pin on the external MCU that can output a logic low or high state on the TEST pin to select the voltage level at device start-up and later disable the GPIO output to preserve energy or reconfigure the GPIO as an input in case the MCU uses any of the PGA460-Q1 test output signals. The external pullup resistor is only required for CMOS 5-V UART communication and is not required for 3-V communication.