SLLSEJ8E June   2014  – April 2019 SN65HVD1470 , SN65HVD1471 , SN65HVD1473 , SN65HVD1474 , SN65HVD1476 , SN65HVD1477

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Block Diagram
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions — SOIC-8 and MSOP-8
    2.     Pin Functions — MSOP–10
    3.     Pin Functions — SOIC-14
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information — D Packages
    5. 7.5  Thermal Information — DGS and DGK Packages
    6. 7.6  Power Dissipation
    7. 7.7  Electrical Characteristics
    8. 7.8  Switching Characteristics — 400 kbps
    9. 7.9  Switching Characteristics — 20 Mbps
    10. 7.10 Switching Characteristics — 50 Mbps
    11. 7.11 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
      1. 9.4.1 Equivalent Circuits
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1.      Master Enable Control
      2.      Slave Enable Control
      3. 10.2.1 Design Requirements
        1. 10.2.1.1 Data Rate and Bus Length
        2. 10.2.1.2 Stub Length
        3. 10.2.1.3 Bus Loading
        4. 10.2.1.4 Receiver Failsafe
        5. 10.2.1.5 Transient Protection
      4. 10.2.2 Detailed Design Procedure
      5. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Related Links
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Community Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3 Recommended Operating Conditions

IEC 61000-4-2 ESD (Contact Discharge), bus pins and GND MIN NOM MAX UNIT
VCC Supply voltage (1) 3 3.3 3.6 V
VI Input voltage at any bus pin (separately or common mode) (2) –7 12 V
VIH High-level input voltage (Driver, driver enable, and receiver enable inputs) 2 VCC V
VIL Low-level input voltage (Driver, driver enable, and receiver enable inputs) 0 0.8 V
VID Differential input voltage –12 12 V
IO Output current, Driver –60 60 mA
IO Output current, Receiver –8 8 mA
RL Differential load resistance 54 60 Ω
CL Differential load capacitance 50 pF
1/tUI Signaling rate HVD1470, HVD1471 400 kbps
HVD1473, HVD1474 20 Mbps
HVD1476, HVD1477 50
TA(3) Operating free-air temperature (See the Application and Implementation for thermal information) –40 125 °C
TJ Junction Temperature –40 150 °C
(1) Exposure to conditions beyond the recommended operation maximum for extended periods may affect device reliability.
(2) The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet.
(3) Operation is specified for internal (junction) temperatures up to 150°C. Self-heating because of internal power dissipation should be considered for each application. Maximum junction temperature is internally limited by the thermal shut-down (TSD) circuit which disables the driver outputs when the junction temperature reaches 170°C.