SLLS562L August   2009  – November 2021 SN65HVD3082E , SN65HVD3085E , SN65HVD3088E , SN75HVD3082E

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Thermal Information
    6. 6.6  Electrical Characteristics: Driver
    7. 6.7  Electrical Characteristics: Receiver
    8. 6.8  Electrical Characteristics
    9. 6.9  Switching Characteristics: Driver
    10. 6.10 Switching Characteristics
    11. 6.11 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Data Rate and Bus Length
        2. 9.2.1.2 Stub Length
        3. 9.2.1.3 Bus Loading
        4. 9.2.1.4 Receiver Failsafe
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Power Usage in an RS-485 Transceiver
        2. 9.2.2.2 Low-Power Shutdown Mode
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations for IC Packages
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Parameter Measurement Information

Test load capacitance includes probe and jig capacitance (unless otherwise specified). Signal generator characteristics: rise and fall time < 6 ns, pulse rate 100 kHz, 50% duty cycle. ZO = 50 Ω (unless otherwise specified).

GUID-EB3CFCCC-4C07-41BC-8C41-9621AF6CD3BB-low.gif Figure 7-1 Driver Test Circuit, VOD and VOC Without Common-Mode Loading
GUID-D8E777A0-42AA-4710-8F14-EBA15A69C2F5-low.gif Figure 7-2 Driver Test Circuit, VOD With Common-Mode Loading
GUID-3EEA11E9-106A-4AB3-A82D-33F61946A65D-low.gif Figure 7-3 Driver VOC Test Circuit and Waveforms
GUID-001B5393-B90D-480D-B130-055F06BC638E-low.gif Figure 7-4 Driver Switching Test Circuit and Waveforms
GUID-51889F43-02B3-4C36-AB8C-C154BE780070-low.gif Figure 7-5 Driver Enable and Disable Test Circuit and Waveforms, High Output
GUID-D653EE73-4183-47FB-A70E-788025AAE4BD-low.gif Figure 7-6 Driver Enable and Disable Test Circuit and Waveforms, Low Output
GUID-999C2F70-F58F-4152-BB1C-FF6A61E1D0F7-low.gif Figure 7-7 Driver Short-Circuit
GUID-654629F8-5161-44F0-B107-D86F44544EBB-low.gif Figure 7-8 Receiver Switching Test Circuit and Waveforms
GUID-3DC7F4D7-100F-45EB-82E8-235D152B4938-low.gif Figure 7-9 Receiver Switching Test Circuit and Waveforms
GUID-B8A31C4A-EAB4-42B7-B978-671EEE4AB119-low.gif Figure 7-10 Receiver Enable and Disable Test Circuit and Waveforms, Data Output High
GUID-4527BA7C-3DF6-4492-8B4F-BCCF39018062-low.gif Figure 7-11 Receiver Enable and Disable Test Circuit and Waveforms, Data Output Low
GUID-4E1947C5-3D58-41F7-A3F3-8820F9D8A3B0-low.gif Figure 7-12 Receiver Enable From Shutdown Test Circuit and Waveforms
GUID-B673270D-7321-498D-BC0D-1D0D5E8B9092-low.gif Figure 7-13 Test Circuit and Waveforms, Transient Overvoltage Test
GUID-3F4E59CD-1514-495A-B823-DF232970B787-low.gif Figure 7-14 Equivalent Input and Output Schematic Diagrams