SCES015M JULY 1995 – June 2015 SN74ALVCH16245
This 16-bit (dual-octal) noninverting bus transceiver is designed for 1.65-V to 3.6-V VCC operation.
The SN74ALVCH16245 device is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports is always active and must have a logic high or low level applied to prevent excess ICC and ICCZ.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
|PART NUMBER||PACKAGE||BODY SIZE (NOM)|
|SN74ALVCH16245ZRD||BGA MICROSTAR JUNIOR (56)||4.50 mm × 7.00 mm|
|SN74ALVCH16245ZQL||BGA MICROSTAR JUNIOR (54)||5.50 mm × 8.00 mm|
|SN74ALVCH16245DGG||TSSOP (48)||6.10 mm × 12.50 mm|
|SN74ALVCH16245DGV||TVSOP (48)||4.40 mm × 9.70 mm|
|SN74ALVCH16245DL||SSOP (48)||7.50 mm × 15.80 mm|