SCES898C July   2019  – May 2022 SN74AXC4T774

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Switching Characteristics, VCCA = 0.7 ± 0.05 V
    7. 5.7  Switching Characteristics, VCCA = 0.8 ± 0.04 V
    8. 5.8  Switching Characteristics, VCCA = 0.9 ± 0.045 V
    9. 5.9  Switching Characteristics, VCCA = 1.2 ± 0.1 V
    10. 5.10 Switching Characteristics, VCCA = 1.5 ± 0.1 V
    11. 5.11 Switching Characteristics, VCCA = 1.8 ± 0.15 V
    12. 5.12 Switching Characteristics, VCCA = 2.5 ± 0.2 V
    13. 5.13 Switching Characteristics, VCCA = 3.3 ± 0.3 V
    14. 5.14 Operating Characteristics: TA = 25°C
    15. 5.15 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 Load Circuit and Voltage Waveforms
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Standard CMOS Inputs
      2. 7.3.2  Balanced High-Drive CMOS Push-Pull Outputs
      3. 7.3.3  Partial Power Down (Ioff)
      4. 7.3.4  VCC Isolation
      5. 7.3.5  Over-voltage Tolerant Inputs
      6. 7.3.6  Glitch-Free Power Supply Sequencing
      7. 7.3.7  Negative Clamping Diodes
      8. 7.3.8  Fully Configurable Dual-Rail Design
      9. 7.3.9  I/Os with Integrated Static Pull-Down Resistors
      10. 7.3.10 Supports High-Speed Translation
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Fully configurable dual-rail design allows each port to operate with a power supply range from 0.65 V to 3.6 V
  • Operating temperature from –40°C to +125°C
  • Independent direction control pins to allow configurable up and down translation
  • Glitch-free power supply sequencing
  • Up to 310 Mbps support when translating from 1.8 V to 3.3 V
  • VCC isolation feature
    • If either VCC input is below 100 mV, all I/Os outputs are disabled and become high-impedance
  • Ioff supports partial-power-down mode operation
  • Compatible with AVC family level shifters
  • Latch-up performance exceeds 100 mA per JESD 78, Class II
  • ESD protection exceeds JESD 22
    • 8000-V human-body model
    • 1000-V charged-device model