SCDS136C October   2003  – May 2018 SN74CB3T3245

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Typical Application Functional Diagram
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DGV|20
  • DBQ|20
  • DW|20
  • PW|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Functional Block Diagram

SN74CB3T3245 wave_form.gif
If the input high voltage (VIH) level is greater than or equal to VCC + 1V, and less than or equal to 5.5V, the output high voltage (VOH) level will be equal to approximately the VCC voltage level.
Figure 5. Typical DC Voltage Translation Characteristics
SN74CB3T3245 ld_cds136.gifFigure 6. Logic Diagram (Positive Logic)
SN74CB3T3245 simp_schem_cds136.gifFigure 7. Simplified Schematic, Each FET Switch (SW)