SCES336J May   2000  – January 2016 SN74LV06A

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Switching Characteristics, VCC = 2.5 V ± 0.2 V
    7. 6.7  Switching Characteristics, VCC = 3.3 V ± 0.3 V
    8. 6.8  Switching Characteristics, VCC = 5 V ± 0.5 V
    9. 6.9  Noise Characteristics
    10. 6.10 Operating Characteristics
    11. 6.11 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|14
  • DB|14
  • DGV|14
  • PW|14
  • NS|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Detailed Description

8.1 Overview

These hex inverter buffers/drivers are designed for 2-V to 5.5-V VCC operation.

The SN74LV06A device performs the Boolean function Y = A in positive logic.

The open-drain output require pull-up resistors to perform correctly and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions.

These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current back-flow through the devices when they are powered down.

8.2 Functional Block Diagram

SN54LV06A SN74LV06A ld_SCES336.gif Figure 4. Logic Diagram (Positive Logic)

8.3 Feature Description

  • Wide operating voltage range
    • Operates from 2 V to 5.5 V
  • Allows up or down voltage translation
    • Inputs and outputs accept voltages to 5.5 V
  • Ioff feature
    • Allows voltages on the inputs and outputs when VCC is 0 V

8.4 Device Functional Modes

Table 1. Function Table
(Each Inverter)

INPUT
A		 OUTPUT
Y
H L
L H