SCLS402R April   1998  – March 2023 SN74LV165A

PRODMIX  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Timing Requirements, VCC = 2.5 V ± 0.2 V
    7. 6.7  Timing Requirements, VCC = 3.3 V ± 0.3 V
    8. 6.8  Timing Requirements, VCC = 5 V ± 0.5 V
    9. 6.9  Switching Characteristics, VCC = 2.5 V ± 0.2 V
    10. 6.10 Switching Characteristics, VCC = 3.3 V ± 0.3 V
    11. 6.11 Switching Characteristics,VCC = 5 V ± 0.5 V
    12. 6.12 Timing Diagrams
    13. 6.13 Operating Characteristics
    14. 6.14 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Balanced CMOS Push-Pull Outputs
      2. 8.3.2 Latching Logic
      3. 8.3.3 Partial Power Down (Ioff)
      4. 8.3.4 Clamp Diode Structure
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Power Considerations
      2. 9.2.2 Input Considerations
      3. 9.2.3 Output Considerations
      4. 9.2.4 Detailed Design Procedure
      5. 9.2.5 Application Curve
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Configuration and Functions

GUID-E88572F8-7CBF-452F-9306-476E821C79A3-low.gifFigure 5-1 D, DB, DGV, N or PW Package,
16-Pin SOIC, SSOP, TVSOP, SOP or TSSOP
(Top View)
GUID-20200827-CA0I-XQTD-RJ5P-KXKTNRGPF8T8-low.gifFigure 5-2 RGY or BQB Package,
16-Pin VQFN or WQFN
(Top View)
Table 5-1 Pin Functions
PINTYPE (1)DESCRIPTION
NAMENO.
A11ISerial input A
B12ISerial input B
C13ISerial input C
CLK2IStorage clock
CLK INH15IStorage clock
D14ISerial input D
E3ISerial input E
F4ISerial input F
G5ISerial input G
GND8GGround pin
H6ISerial input H
QH7OOutput H, inverted
QH9OOutput H
SH/ LD1ILoad Input
SER10ISerial input
VCC16PPower pin
PADThermal Pad(2)
I = Input, O = Output, I/O = Input or Output, G = Ground, P = Power.
RGY and BQB Package Only