SCLS741C November   2013  – October 2023 SN74LV1T32

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. 5
  6. Related Products
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Operating Characteristics
    8. 7.8 Typical Characteristics
  9. Parameter Measurement Information
  10. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Clamp Diode Structure
      2. 9.3.2 Balanced CMOS Push-Pull Outputs
      3. 9.3.3 LVxT Enhanced Input Voltage
        1. 9.3.3.1 Down Translation
        2. 9.3.3.2 Up Translation
    4. 9.4 Device Functional Modes
  11. 10Application and Implementation
    1. 10.1 Power Supply Recommendations
    2. 10.2 Layout
      1. 10.2.1 Layout Guidelines
        1. 10.2.1.1 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support (Analog)
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
VCC Supply voltage 1.6 5.5 V
VI Input voltage 0 5.5 V
VO Output voltage 0 VCC V
IOH High-level output current VCC = 1.8 V –3 mA
VCC = 2.5 V –5
VCC = 3.3 V –7
VCC = 5.0 V –8
IOL Low-level output current VCC = 1.8 V 3 mA
VCC = 2.5 V 5
VCC = 3.3 V 7
VCC = 5.0 V 8
Δt/Δv Input transition rise or fall rate VCC = 1.8 V 20 ns/V
VCC = 3.3 V or 2.5 V 20
VCC = 5.0 V 20
TA Operating free-air temperature –40 125 °C
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.