SCLS874A March   2022  – June 2022 SN74LV4T125-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Switching Characteristics 1.8-V VCC
    7. 6.7  Switching Characteristics 2.5-V VCC
    8. 6.8  Switching Characteristics 3.3-V VCC
    9. 6.9  Switching Characteristics 5.0-V VCC
    10. 6.10 Noise Characteristics
    11. 6.11 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Balanced CMOS 3-State Outputs
      2. 8.3.2 Clamp Diode Structure
      3. 8.3.3 LVxT Enhanced Input Voltage
        1. 8.3.3.1 Down Translation
        2. 8.3.3.2 Up Translation
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Power Considerations
        2. 9.2.1.2 Input Considerations
        3. 9.2.1.3 Output Considerations
      2. 9.2.2 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)(1)
PARAMETER CONDITION MIN MAX UNIT
VCC Supply voltage 1.6 5.5 V
VI Input Voltage 0 5.5 V
VO Output Voltage 3-state (Hi-Z) 0 VCC V
HIGH or LOW state 0 VCC V
VIH High-level input voltage VCC = 1.65 V to 2 V 1.1 V
VCC = 2.25 V to 2.75 V 1.28
VCC = 3 V to 3.6 V 1.45
VCC = 4.5 V to 5.5 V 2.00
VIL Low-Level input voltage VCC = 1.65 V to 2 V 0.51 V
VCC = 2.25 V to 2.75 V 0.65
VCC = 3 V to 3.6 V 0.75
VCC = 4.5 V to 5.5 V 0.8
IO Output Current VCC = 1.65 V to 2.0 V ±8 mA
VCC = 2.25 V to 2.75 V ±15
VCC = 3.3 V to 5.0 V ±25
Δt/Δv Input transition rise or fall rate VCC = 1.6 V to 5.0 V 20 ns/V
TA Operating free-air temperature –40 125 °C
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or FLoating CMOS Inputs.