SCES584B JUNE   2005  – November 2014 SN74LVC8T245

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Logic Diagram (Positive Logic)
  5. Revision History
  6. Description (continued)
  7. Pin Configuration and Functions
  8. Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  Handling Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Thermal Information DB, DBQ and DGV
    5. 8.5  Thermal Information PW and RHL
    6. 8.6  Electrical Characteristics
    7. 8.7  Switching Characteristics, VCCA = 1.8 V ± 0.15 V
    8. 8.8  Switching Characteristics, VCCA = 2.5 V ± 0.2 V
    9. 8.9  Switching Characteristics, VCCA = 3.3 V ± 0.3 V
    10. 8.10 Switching Characteristics, VCCA = 5 V ± 0.5 V
    11. 8.11 Operating Characteristics
    12. 8.12 Typical Characteristics
  9. Parameter Measurement Information
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Functional Block Diagram
    3. 10.3 Feature Description
      1. 10.3.1 Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.65-V to 5.5-V Power-Supply Range
      2. 10.3.2 Ioff Supports Partial-Power-Down Mode Operation
    4. 10.4 Device Functional Modes
  11. 11Application and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Application
      1. 11.2.1 Design Requirements
      2. 11.2.2 Detailed Design Procedure
      3. 11.2.3 Application Curve
  12. 12Power Supply Recommendations
  13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Layout Example
  14. 14Device and Documentation Support
    1. 14.1 Trademarks
    2. 14.2 Electrostatic Discharge Caution
    3. 14.3 Glossary
  15. 15Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DGV|24
  • DBQ|24
  • RHL|24
  • NS|24
  • DB|24
  • DW|24
  • PW|24
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Detailed Description

10.1 Overview

The SN74LVC8T245 is an 8-bit, dual supply non-inverting voltage level translation. Pin Ax and direction control pin are support by VCCA and pin Bx is support by VCCB. The A port is able to accept I/O voltages ranging from 1.65 V to 5.5 V, while the B port can accept I/O voltages from 1.65 V to 5.5 V. The high on DIR allows data transmission from A to B and a low on DIR allows data transmission from B to A.

10.2 Functional Block Diagram

lo_ces584.gifFigure 4. Logic Diagram (Positive Logic)

10.3 Feature Description

10.3.1 Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.65-V to 5.5-V Power-Supply Range

Both VCCA and VCCB can be supplied at any voltage between 1.65 V and 5.5 V making the device suitable for translating between any of the voltage nodes (1.8 V, 2.5 V, 3.3 V and 5 V).

10.3.2 Ioff Supports Partial-Power-Down Mode Operation

Ioff prevents backflow current by disabling I/O output circuits when device is in partial-power-down mode.

10.4 Device Functional Modes

The SN74LVC8T245 is voltage level translator that can operate from 1.65 V to 5.5 V (VCCA) and 1.65 V to 5.5 V (VCCB). The signal translation between 1.65 V and 5.5 V requires direction control and output enable control. When OE is low and DIR is high, data transmission is from A to B. When OE is low and DIR is low, data transmission is from B to A. When OE is high, both output ports will be high-impedance.

Table 1. Function Table(1)
(Each 8-Bit Section)

CONTROL INPUTS OUTPUT CIRCUITS OPERATION
OE DIR A PORT B PORT
L L Enabled Hi-Z B data to A bus
L H Hi-Z Enabled A data to B bus
H X Hi-Z Hi-Z Isolation
(1) Input circuits of the data I/Os are always active.