SLLS505P February   2002  – February 2022 SN65HVD10 , SN65HVD11 , SN65HVD12 , SN75HVD12

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Driver Electrical Characteristics
    6. 7.6  Receiver Electrical Characteristics
    7. 7.7  Power Dissipation Characteristics
    8. 7.8  Driver Switching Characteristics
    9. 7.9  Receiver Switching Characteristics
    10. 7.10 Dissipation Ratings
    11. 7.11 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
      1. 9.4.1 Low-Power Standby Mode
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
        1. 10.2.1.1 Data Rate and Bus Length
        2. 10.2.1.2 Stub Length
        3. 10.2.1.3 Bus Loading
        4. 10.2.1.4 Receiver Fail-safe
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
    3. 12.3 Thermal Considerations
      1. 12.3.1 Thermal Characteristics of IC Packages
  13. 13Device and Documentation Support
    1. 13.1 Device Support
    2. 13.2 Related Links
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Support Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.6 Receiver Electrical Characteristics

Over recommended operating conditions unless otherwise noted
PARAMETERTEST CONDITIONSMINTYP(1)MAXUNIT
VIT+Positive-going input threshold voltageIO = –8 mA–0.065–0.01V
VIT–Negative-going input threshold voltageIO = 8 mA–0.2–0.1
VhysHysteresis voltage (VIT+ – VIT–)35mV
VIKEnable-input clamp voltageII = –18 mA–1.5V
VOHHigh-level output voltageVID = 200 mV, IOH = –8 mA, see Figure 8-82.4V
VOLLow-level output voltageVID = –200 mV, IOL = 8 mA, see Figure 8-80.4V
IOZHigh-impedance-state output currentVO = 0 or VCC, RE at VCC–11μA
IIBus input currentVA or VB = 12 VHVD11, HVD12,
Other inputs at 0 V		0.050.11mA
VA or VB = 12 V, VCC = 0 V0.060.13
VA or VB = –7 V–0.1–0.05
VA or VB = –7 V, VCC = 0 V–0.05–0.04
VA or VB = 12 VHVD10,
Other inputs at 0 V		0.20.5mA
VA or VB = 12 V, VCC = 0 V0.250.5
VA or VB = –7 V–0.4–0.2
VA or VB = –7 V, VCC = 0 V–0.4–0.15
IIHHigh-level input current, REVIH = 2 V–300μA
IILLow-level input current, REVIL = 0.8 V–300μA
CIDDifferential input capacitanceVID = 0.4 sin(4E6πt) + 0.5 V, DE at 0 V15pF
ICCSupply currentRE at 0 V
D and DE at 0 V
No load		Receiver enabled and driver disabled48mA
RE at VCC
D at VCC
DE at 0 V
No load		Receiver disabled and driver disabled (standby)15μA
RE at 0 V
D and DE at VCC
No load		Receiver enabled and driver enabled915.5mA
(1) All typical values are at 25°C and with a 3.3-V supply.