SLASEC2B November   2016  – February 2019 TAS2557

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  I2C Timing Requirements
    7. 7.7  SPI Timing Requirements
    8. 7.8  I2S/LJF/RJF Timing Requirements (Master Mode)
    9. 7.9  I2S/LJF/RJF Timing Requirements (Slave Mode)
    10. 7.10 DSP Timing Requirements (Master Mode)
    11. 7.11 DSP Timing Requirements (Slave Mode)
    12. 7.12 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  General I2C Operation
      2. 9.3.2  Single-Byte and Multiple-Byte Transfers
      3. 9.3.3  Single-Byte Write
      4. 9.3.4  Multiple-Byte Write and Incremental Multiple-Byte Write
      5. 9.3.5  Single-Byte Read
      6. 9.3.6  Multiple-Byte Read
      7. 9.3.7  General SPI Operation
      8. 9.3.8  Class-D Edge Rate Control
      9. 9.3.9  IV Sense
      10. 9.3.10 Battery Tracking AGC
      11. 9.3.11 Boost Control
        1. 9.3.11.1 Boost Mode
        2. 9.3.11.2 Configurable Boost Current Limit (ILIM)
      12. 9.3.12 Thermal Fold-back
      13. 9.3.13 Fault Protection
        1. 9.3.13.1 Speaker Over-Current
        2. 9.3.13.2 Analog Under-Voltage
        3. 9.3.13.3 Die Over-Temperature
        4. 9.3.13.4 Clocking Faults
      14. 9.3.14 Brownout
      15. 9.3.15 Spread Spectrum vs Synchronized
      16. 9.3.16 IRQs and Flags
      17. 9.3.17 Software Reset
      18. 9.3.18 PurePath Console 3 Software TAS2557 Application
      19. 9.3.19 Operational Modes
        1. 9.3.19.1 Hardware Shutdown
        2. 9.3.19.2 Software Shutdown
        3. 9.3.19.3 Low Power Sleep
        4. 9.3.19.4 Software Reset
        5. 9.3.19.5 Device Processing Modes
          1. 9.3.19.5.1 Mode 1 - PCM input playback only
          2. 9.3.19.5.2 Mode 2 - PCM input playback + PCM IVsense output
          3. 9.3.19.5.3 Mode 3 - Smart Amp Mode
    4. 9.4 Device Functional Modes
      1. 9.4.1 Audio Digital I/O Interface
        1. 9.4.1.1 I2S Mode
        2. 9.4.1.2 DSP Mode
        3. 9.4.1.3 Right-Justified Mode (RJF)
        4. 9.4.1.4 Left-Justified Mode (LJF)
      2. 9.4.2 Mono PCM Mode
      3. 9.4.3 Stereo Application Example - TDM Mode
    5. 9.5 Programming
      1. 9.5.1 Code Loading and CRC check
      2. 9.5.2 Device Power Up and Unmute Sequence
      3. 9.5.3 Device Mute and Power Down Sequence
    6. 9.6 Register Map
      1. 9.6.1 Register Map Summary
        1. 9.6.1.1 Register Summary Table Book=0x00 Page=0x00
        2. 9.6.1.2 Register Summary Table Book=0x00 Page=0x01
        3. 9.6.1.3 Register Summary Table Book=0x00 Page=0x02
      2. 9.6.2 Register Maps
        1. 9.6.2.1   PAGE (book=0x00 page=0x00 address=0x00) [reset=0h]
          1. Table 23. Page Select Field Descriptions
        2. 9.6.2.2   RESET (book=0x00 page=0x00 address=0x01) [reset=0h]
          1. Table 24. Software Reset Field Descriptions
        3. 9.6.2.3   POWER_1 (book=0x00 page=0x00 address=0x04) [reset=0h]
          1. Table 25. Power Up 1 Field Descriptions
        4. 9.6.2.4   POWER_2 (book=0x00 page=0x00 address=0x05) [reset=0h]
          1. Table 26. Power Up 2 Field Descriptions
        5. 9.6.2.5   SPK_GAIN_EDGE (book=0x00 page=0x00 address=0x06) [reset=0h]
          1. Table 27. Class-D Speaker Configuration Field Descriptions
        6. 9.6.2.6   MUTE (book=0x00 page=0x00 address=0x07) [reset=0h]
          1. Table 28. Mute Configuration Field Descriptions
        7. 9.6.2.7   SNS_CTRL (book=0x00 page=0x00 address=0x08) [reset=0h]
          1. Table 29. Sense Channel Control Field Descriptions
        8. 9.6.2.8   BOOST_CTRL_1 (book=0x00 page=0x00 address=0x09) [reset=0h]
          1. Table 30. Boost Control 1 Field Descriptions
        9. 9.6.2.9   SAR_CTRL_2 (book=0x00 page=0x00 address=0x14) [reset=32h]
          1. Table 31. SAR Control 2 Field Descriptions
        10. 9.6.2.10  SAR_CTRL_3 (book=0x00 page=0x00 address=0x15) [reset=4h]
          1. Table 32. SAR Control 3 Field Descriptions
        11. 9.6.2.11  SAR_VBAT_MSB (book=0x00 page=0x00 address=0x16) [reset=0h]
          1. Table 33. SAR VBAT Readback Field Descriptions
        12. 9.6.2.12  SAR_VBAT_LSB (book=0x00 page=0x00 address=0x17) [reset=0h]
          1. Table 34. SAR VBAT Readback Field Descriptions
        13. 9.6.2.13  SAR_VBST_MSB (book=0x00 page=0x00 address=0x18) [reset=0h]
          1. Table 35. SAR VBOOST Readback Field Descriptions
        14. 9.6.2.14  SAR_VBST_LSB (book=0x00 page=0x00 address=0x19) [reset=0h]
          1. Table 36. SAR VBOOST Readback Field Descriptions
        15. 9.6.2.15  SAR_TMP1_MSB (book=0x00 page=0x00 address=0x1A) [reset=0h]
          1. Table 37. SAR TEMP1 Readback Field Descriptions
        16. 9.6.2.16  SAR_TMP1_LSB (book=0x00 page=0x00 address=0x1B) [reset=0h]
          1. Table 38. SAR TEMP1 Readback Field Descriptions
        17. 9.6.2.17  SAR_TMP2_MSB (book=0x00 page=0x00 address=0x1C) [reset=0h]
          1. Table 39. SAR TEMP2 Readback Field Descriptions
        18. 9.6.2.18  SAR_TMP2_LSB (book=0x00 page=0x00 address=0x1D) [reset=0h]
          1. Table 40. SAR TEMP2 Readback Field Descriptions
        19. 9.6.2.19  CRC_CHECKSUM (book=0x00 page=0x00 address=0x20) [reset=0h]
          1. Table 41. Checksum Field Descriptions
        20. 9.6.2.20  CRC_RESET (book=0x00 page=0x00 address=0x21) [reset=0h]
          1. Table 42. Checksum Reset Field Descriptions
        21. 9.6.2.21  DSP_CTRL (book=0x00 page=0x00 address=0x22) [reset=1h]
          1. Table 43. DSP Control Field Descriptions
        22. 9.6.2.22  SSM_CTRL (book=0x00 page=0x00 address=0x28) [reset=0h]
          1. Table 44. Spread-Spectrum Control Field Descriptions
        23. 9.6.2.23  ASI_CTRL_1 (book=0x00 page=0x00 address=0x2A) [reset=0h]
          1. Table 45. ASI Control 1 Field Descriptions
        24. 9.6.2.24  BOOST_CTRL_2 (book=0x00 page=0x00 address=0x2B) [reset=3h]
          1. Table 46. Boost Control 1 Field Descriptions
        25. 9.6.2.25  CLOCK_CTRL_1 (book=0x00 page=0x00 address=0x2C) [reset=0h]
          1. Table 47. Clock Control 1 Field Descriptions
        26. 9.6.2.26  CLOCK_CTRL_2 (book=0x00 page=0x00 address=0x2D) [reset=17h]
          1. Table 48. Clock Control 2 Field Descriptions
        27. 9.6.2.27  CLOCK_CTRL_3 (book=0x00 page=0x00 address=0x2E) [reset=0h]
          1. Table 49. Clock Control 3 Field Descriptions
        28. 9.6.2.28  ASI_CTRL_2 (book=0x00 page=0x00 address=0x2F) [reset=0h]
          1. Table 50. ASI Control 2 Field Descriptions
        29. 9.6.2.29  CLOCK_CTRL_4 (book=0x00 page=0x00 address=0x32) [reset=0h]
          1. Table 51. Clock Control 4 Field Descriptions
        30. 9.6.2.30  DEBUG_1 (book=0x00 page=0x00 address=0x35) [reset=0h]
          1. Table 52. Debug Register 1 Field Descriptions
        31. 9.6.2.31  POWER_STATUS (book=0x00 page=0x00 address=0x64) [reset=0h]
          1. Table 53. Power Up Status Field Descriptions
        32. 9.6.2.32  DSP_BOOT_STATUS (book=0x00 page=0x00 address=0x65) [reset=0h]
          1. Table 54. DSP Boost Status Field Descriptions
        33. 9.6.2.33  INT_DET_1 (book=0x00 page=0x00 address=0x68) [reset=0h]
          1. Table 55. Interrupt Detected 1 Field Descriptions
        34. 9.6.2.34  INT_DET_2 (book=0x00 page=0x00 address=0x6C) [reset=0h]
          1. Table 56. Interrupt Detected 2 Field Descriptions
        35. 9.6.2.35  LOW_POWER (book=0x00 page=0x00 address=0x79) [reset=0h]
          1. Table 57. Lower Power Shutdown Field Descriptions
        36. 9.6.2.36  BOOK (book=0x00 page=0x00 address=0x7F) [reset=0h]
          1. Table 58. Book Selection Field Descriptions
        37. 9.6.2.37  PAGE (book=0x00 page=0x01 address=0x00) [reset=1h]
          1. Table 59. Page Select Field Descriptions
        38. 9.6.2.38  ASI1_FORMAT (book=0x00 page=0x01 address=0x01) [reset=10h]
          1. Table 60. ASI1 Format Field Descriptions
        39. 9.6.2.39  ASI1_OFFSET_1 (book=0x00 page=0x01 address=0x03) [reset=0h]
          1. Table 61. ASI1 Offset Field Descriptions
        40. 9.6.2.40  ASI1_BUSKEEP (book=0x00 page=0x01 address=0x05) [reset=0h]
          1. Table 62. ASI1 Buskeeper Field Descriptions
        41. 9.6.2.41  ASI1_BCLK (book=0x00 page=0x01 address=0x08) [reset=0h]
          1. Table 63. ASI1 BCLK Field Descriptions
        42. 9.6.2.42  ASI1_WCLK (book=0x00 page=0x01 address=0x09) [reset=8h]
          1. Table 64. ASI1 WCLK Field Descriptions
        43. 9.6.2.43  ASI1_DIN_DOUT (book=0x00 page=0x01 address=0x0C) [reset=0h]
          1. Table 65. ASI1 DIN/DOUT Field Descriptions
        44. 9.6.2.44  ASI1_BDIV_CLK (book=0x00 page=0x01 address=0x0D) [reset=1h]
          1. Table 66. ASI1 BDIV Clock Field Descriptions
        45. 9.6.2.45  ASI1_BDIV_RATIO (book=0x00 page=0x01 address=0x0E) [reset=2h]
          1. Table 67. ASI1 BDIV Ratio Field Descriptions
        46. 9.6.2.46  ASI1_WDIV_RATIO (book=0x00 page=0x01 address=0x0F) [reset=20h]
          1. Table 68. ASI1 WDIV Ratio Field Descriptions
        47. 9.6.2.47  ASI1_CLK_OUT (book=0x00 page=0x01 address=0x10) [reset=0h]
          1. Table 69. ASI1 Clock Source Field Descriptions
        48. 9.6.2.48  ASI2_FORMAT (book=0x00 page=0x01 address=0x15) [reset=10h]
          1. Table 70. ASI2 Format Field Descriptions
        49. 9.6.2.49  ASI2_OFFSET_1 (book=0x00 page=0x01 address=0x17) [reset=0h]
          1. Table 71. ASI2 Offset Field Descriptions
        50. 9.6.2.50  ASI2_BUSKEEP (book=0x00 page=0x01 address=0x19) [reset=0h]
          1. Table 72. ASI2 Buskeeper Field Descriptions
        51. 9.6.2.51  ASI2_BCLK (book=0x00 page=0x01 address=0x1C) [reset=20h]
          1. Table 73. ASI2 BCLK Field Descriptions
        52. 9.6.2.52  ASI2_WCLK (book=0x00 page=0x01 address=0x1D) [reset=28h]
          1. Table 74. ASI2 WCLK Field Descriptions
        53. 9.6.2.53  ASI2_DIN_DOUT (book=0x00 page=0x01 address=0x20) [reset=38h]
          1. Table 75. ASI2 DIN/DOUT Field Descriptions
        54. 9.6.2.54  ASI2_BDIV_CLK (book=0x00 page=0x01 address=0x21) [reset=1h]
          1. Table 76. ASI2 BDIV Clock Field Descriptions
        55. 9.6.2.55  ASI2_BDIV_RATIO (book=0x00 page=0x01 address=0x22) [reset=2h]
          1. Table 77. ASI2 BDIV Ratio Field Descriptions
        56. 9.6.2.56  ASI2_WDIV_RATIO (book=0x00 page=0x01 address=0x23) [reset=20h]
          1. Table 78. ASI2 WDIV Ratio Field Descriptions
        57. 9.6.2.57  ASI2_CLK_OUT (book=0x00 page=0x01 address=0x24) [reset=33h]
          1. Table 79. ASI2 Clock Source Field Descriptions
        58. 9.6.2.58  GPIO1_PIN (book=0x00 page=0x01 address=0x3D) [reset=1h]
          1. Table 80. GPIO1 Field Descriptions
        59. 9.6.2.59  GPIO2_PIN (book=0x00 page=0x01 address=0x3E) [reset=1h]
          1. Table 81. GPIO2 Field Descriptions
        60. 9.6.2.60  GPIO3_PIN (book=0x00 page=0x01 address=0x3F) [reset=10h]
          1. Table 82. GPIO3 Field Descriptions
        61. 9.6.2.61  GPIO4_PIN (book=0x00 page=0x01 address=0x40) [reset=7h]
          1. Table 83. GPIO4 Field Descriptions
        62. 9.6.2.62  GPIO5_PIN (book=0x00 page=0x01 address=0x41) [reset=0h]
          1. Table 84. GPIO5 Field Descriptions
        63. 9.6.2.63  GPIO6_PIN (book=0x00 page=0x01 address=0x42) [reset=0h]
          1. Table 85. GPIO6 Field Descriptions
        64. 9.6.2.64  GPIO7_PIN (book=0x00 page=0x01 address=0x43) [reset=0h]
          1. Table 86. GPIO7 Field Descriptions
        65. 9.6.2.65  GPIO8_PIN (book=0x00 page=0x01 address=0x44) [reset=0h]
          1. Table 87. GPIO8 Field Descriptions
        66. 9.6.2.66  GPIO9_PIN (book=0x00 page=0x01 address=0x45) [reset=0h]
          1. Table 88. GPIO9 Field Descriptions
        67. 9.6.2.67  GPIO10_PIN (book=0x00 page=0x01 address=0x46) [reset=0h]
          1. Table 89. GPIO10 Field Descriptions
        68. 9.6.2.68  GPI_PIN (book=0x00 page=0x01 address=0x4D) [reset=0h]
          1. Table 90. GPI Pin Mode Field Descriptions
        69. 9.6.2.69  GPIO_HIZ_1 (book=0x00 page=0x01 address=0x4F) [reset=0h]
          1. Table 91. GPIO HiZ 1 Field Descriptions
        70. 9.6.2.70  GPIO_HIZ_2 (book=0x00 page=0x01 address=0x50) [reset=0h]
          1. Table 92. GPIO HiZ 2 Field Descriptions
        71. 9.6.2.71  GPIO_HIZ_3 (book=0x00 page=0x01 address=0x51) [reset=0h]
          1. Table 93. GPIO HiZ 3 Field Descriptions
        72. 9.6.2.72  GPIO_HIZ_4 (book=0x00 page=0x01 address=0x52) [reset=0h]
          1. Table 94. GPIO HiZ 4 Field Descriptions
        73. 9.6.2.73  GPIO_HIZ_5 (book=0x00 page=0x01 address=0x53) [reset=0h]
          1. Table 95. GPIO HiZ 5 Field Descriptions
        74. 9.6.2.74  BIT_BANG_OUT1 (book=0x00 page=0x01 address=0x58) [reset=0h]
          1. Table 96. Bit Bang Output 1 Field Descriptions
        75. 9.6.2.75  BIT_BANG_OUT2 (book=0x00 page=0x01 address=0x59) [reset=0h]
          1. Table 97. Bit Bang Output 2 Field Descriptions
        76. 9.6.2.76  BIT_BANG_IN1 (book=0x00 page=0x01 address=0x5A) [reset=0h]
          1. Table 98. Bit Bang Input 1 Field Descriptions
        77. 9.6.2.77  BIT_BANG_IN2 (book=0x00 page=0x01 address=0x5B) [reset=0h]
          1. Table 99. Bit Bang Input 2 Field Descriptions
        78. 9.6.2.78  BIT_BANG_IN3 (book=0x00 page=0x01 address=0x5C) [reset=0h]
          1. Table 100. Bit Bang Input 3 Field Descriptions
        79. 9.6.2.79  ASIM_BUSKEEP (book=0x00 page=0x01 address=0x60) [reset=0h]
          1. Table 101. ASIM Buskeeper Field Descriptions
        80. 9.6.2.80  ASIM_MODE (book=0x00 page=0x01 address=0x61) [reset=8h]
          1. Table 102. ASIM Mode Field Descriptions
        81. 9.6.2.81  ASIM_NUM_DEV (book=0x00 page=0x01 address=0x62) [reset=0h]
          1. Table 103. ASIM Number Devices Field Descriptions
        82. 9.6.2.82  ASIM_FORMAT (book=0x00 page=0x01 address=0x63) [reset=10h]
          1. Table 104. ASIM Format Field Descriptions
        83. 9.6.2.83  ASIM_BDIV_CLK (book=0x00 page=0x01 address=0x64) [reset=1h]
          1. Table 105. ASIM BDIV Clock Field Descriptions
        84. 9.6.2.84  ASIM_BDIV_RATIO (book=0x00 page=0x01 address=0x65) [reset=2h]
          1. Table 106. ASIM BDIV Ratio Field Descriptions
        85. 9.6.2.85  ASIM_WDIV_RATIO_1 (book=0x00 page=0x01 address=0x66) [reset=0h]
          1. Table 107. ASIM WDIV Ratio Field Descriptions
        86. 9.6.2.86  ASIM_WDIV_RATIO_2 (book=0x00 page=0x01 address=0x67) [reset=20h]
          1. Table 108. ASIM WDIV Ratio Field Descriptions
        87. 9.6.2.87  ASIM_BCLK (book=0x00 page=0x01 address=0x68) [reset=40h]
          1. Table 109. ASI1 BCLK Field Descriptions
        88. 9.6.2.88  ASIM_WCLK (book=0x00 page=0x01 address=0x69) [reset=38h]
          1. Table 110. ASI1 WCLK Field Descriptions
        89. 9.6.2.89  ASIM_DIN (book=0x00 page=0x01 address=0x6A) [reset=70h]
          1. Table 111. ASI1 DIN Field Descriptions
        90. 9.6.2.90  INT_GEN_1 (book=0x00 page=0x01 address=0x6C) [reset=0h]
          1. Table 112. Interrupt Generation 1 Field Descriptions
        91. 9.6.2.91  INT_GEN_2 (book=0x00 page=0x01 address=0x6D) [reset=0h]
          1. Table 113. Interrupt Generation 2 Field Descriptions
        92. 9.6.2.92  INT_GEN_3 (book=0x00 page=0x01 address=0x6E) [reset=0h]
          1. Table 114. Interrupt Generation 3 Field Descriptions
        93. 9.6.2.93  INT_GEN_4 (book=0x00 page=0x01 address=0x6F) [reset=0h]
          1. Table 115. Interrupt Generation 4 Field Descriptions
        94. 9.6.2.94  INT_GEN_5 (book=0x00 page=0x01 address=0x70) [reset=0h]
          1. Table 116. Interrupt Generation 5 Field Descriptions
        95. 9.6.2.95  INT_GEN_6 (book=0x00 page=0x01 address=0x71) [reset=0h]
          1. Table 117. Interrupt Generation 6 Field Descriptions
        96. 9.6.2.96  INT_IND_MODE (book=0x00 page=0x01 address=0x72) [reset=0h]
          1. Table 118. Interrupt Indication Mode Field Descriptions
        97. 9.6.2.97  MAIN_CLK_PIN (book=0x00 page=0x01 address=0x73) [reset=Dh]
          1. Table 119. Main Clock Source Field Descriptions
        98. 9.6.2.98  PLL_CLK_PIN (book=0x00 page=0x01 address=0x74) [reset=Dh]
          1. Table 120. PLL Clock Source Field Descriptions
        99. 9.6.2.99  CLKOUT_MUX (book=0x00 page=0x01 address=0x75) [reset=Dh]
          1. Table 121. CDIV_CLKIN Clock Source Field Descriptions
        100. 9.6.2.100 CLKOUT_CDIV_RATIO (book=0x00 page=0x01 address=0x76) [reset=1h]
          1. Table 122. CLKOUT CDIV Ratio Field Descriptions
        101. 9.6.2.101 I2C_MISC (book=0x00 page=0x01 address=0x7C) [reset=0h]
          1. Table 123. I2C Misc Field Descriptions
        102. 9.6.2.102 DEVICE_ID (book=0x00 page=0x01 address=0x7D) [reset=12h]
          1. Table 124. Device ID Field Descriptions
        103. 9.6.2.103 PAGE (book=0x00 page=0x02 address=0x00) [reset=1h]
          1. Table 125. Page Select Field Descriptions
        104. 9.6.2.104 RAMP_CTRL (book=0x00 page=0x02 address=0x06) [reset=0h]
          1. Table 126. Class-D Ramp Control Field Descriptions
        105. 9.6.2.105 PROTECTION_CFG (book=0x00 page=0x02 address=0x09) [reset=3h]
          1. Table 127. Configures the Devices Protection Blocks Field Descriptions
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Mono/Stereo Configuration
        2. 10.2.2.2 Boost Converter Passive Devices
        3. 10.2.2.3 EMI Passive Devices
        4. 10.2.2.4 Miscellaneous Passive Devices
      3. 10.2.3 Application Curve
    3. 10.3 Initialization Setup
  11. 11Power Supply Recommendations
    1. 11.1 Power Supplies
    2. 11.2 Power Supply Sequencing
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
    2. 13.2 Community Resources
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information
    1. 14.1 Package Dimensions

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • YZ|42
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.6.1.2 Register Summary Table Book=0x00 Page=0x01

Addr Register Description Section
0x00 PAGE Page Select PAGE (book=0x00 page=0x00 address=0x00) [reset=0h]
0x01 ASI1_FORMAT ASI1 Format ASI1_FORMAT (book=0x00 page=0x01 address=0x01) [reset=10h]
0x03 ASI1_OFFSET_1 ASI1 Offset ASI1_OFFSET_1 (book=0x00 page=0x01 address=0x03) [reset=0h]
0x04 ASI1_OFFSET_2 ASI1 Offset Second Slot
0x05 ASI1_BUSKEEP ASI1 Buskeeper ASI1_BUSKEEP (book=0x00 page=0x01 address=0x05) [reset=0h]
0x08 ASI1_BCLK ASI1 BCLK ASI1_BCLK (book=0x00 page=0x01 address=0x08) [reset=0h]
0x09 ASI1_WCLK ASI1 WCLK ASI1_WCLK (book=0x00 page=0x01 address=0x09) [reset=8h]
0x0C ASI1_DIN_DOUT ASI1 DIN/DOUT ASI1_DIN_DOUT (book=0x00 page=0x01 address=0x0C) [reset=0h]
0x0D ASI1_BDIV_CLK ASI1 BDIV Clock ASI1_BDIV_CLK (book=0x00 page=0x01 address=0x0D) [reset=1h]
0x0E ASI1_BDIV_RATIO ASI1 BDIV Ratio ASI1_BDIV_RATIO (book=0x00 page=0x01 address=0x0E) [reset=2h]
0x0F ASI1_WDIV_RATIO ASI1 WDIV Ratio ASI1_WDIV_RATIO (book=0x00 page=0x01 address=0x0F) [reset=20h]
0x10 ASI1_CLK_OUT ASI1 Clock Source ASI1_CLK_OUT (book=0x00 page=0x01 address=0x10) [reset=0h]
0x15 ASI2_FORMAT ASI2 Format ASI2_FORMAT (book=0x00 page=0x01 address=0x15) [reset=10h]
0x17 ASI2_OFFSET_1 ASI2 Offset ASI2_OFFSET_1 (book=0x00 page=0x01 address=0x17) [reset=0h]
0x18 ASI2_OFFSET_2 ASI2 Offset Second Slot
0x19 ASI2_BUSKEEP ASI2 Buskeeper ASI2_BUSKEEP (book=0x00 page=0x01 address=0x19) [reset=0h]
0x1C ASI2_BCLK ASI2 BCLK ASI2_BCLK (book=0x00 page=0x01 address=0x1C) [reset=20h]
0x1D ASI2_WCLK ASI2 WCLK ASI2_WCLK (book=0x00 page=0x01 address=0x1D) [reset=28h]
0x20 ASI2_DIN_DOUT ASI2 DIN/DOUT ASI2_DIN_DOUT (book=0x00 page=0x01 address=0x20) [reset=38h]
0x21 ASI2_BDIV_CLK ASI2 BDIV Clock ASI2_BDIV_CLK (book=0x00 page=0x01 address=0x21) [reset=1h]
0x22 ASI2_BDIV_RATIO ASI2 BDIV Ratio ASI2_BDIV_RATIO (book=0x00 page=0x01 address=0x22) [reset=2h]
0x23 ASI2_WDIV_RATIO ASI2 WDIV Ratio ASI2_WDIV_RATIO (book=0x00 page=0x01 address=0x23) [reset=20h]
0x24 ASI2_CLK_OUT ASI2 Clock Source ASI2_CLK_OUT (book=0x00 page=0x01 address=0x24) [reset=33h]
0x3D GPIO1_PIN GPIO1 GPIO1_PIN (book=0x00 page=0x01 address=0x3D) [reset=1h]
0x3E GPIO2_PIN GPIO2 GPIO2_PIN (book=0x00 page=0x01 address=0x3E) [reset=1h]
0x3F GPIO3_PIN GPIO3 GPIO3_PIN (book=0x00 page=0x01 address=0x3F) [reset=10h]
0x40 GPIO4_PIN GPIO4 GPIO4_PIN (book=0x00 page=0x01 address=0x40) [reset=7h]
0x41 GPIO5_PIN GPIO5 GPIO5_PIN (book=0x00 page=0x01 address=0x41) [reset=0h]
0x42 GPIO6_PIN GPIO6 GPIO6_PIN (book=0x00 page=0x01 address=0x42) [reset=0h]
0x43 GPIO7_PIN GPIO7 GPIO7_PIN (book=0x00 page=0x01 address=0x43) [reset=0h]
0x44 GPIO8_PIN GPIO8 GPIO8_PIN (book=0x00 page=0x01 address=0x44) [reset=0h]
0x45 GPIO9_PIN GPIO9 GPIO9_PIN (book=0x00 page=0x01 address=0x45) [reset=0h]
0x46 GPIO10_PIN GPIO10 GPIO10_PIN (book=0x00 page=0x01 address=0x46) [reset=0h]
0x4D GPI_PIN GPI Pin Mode GPI_PIN (book=0x00 page=0x01 address=0x4D) [reset=0h]
0x4F GPIO_HIZ_1 GPIO HiZ 1 GPIO_HIZ_1 (book=0x00 page=0x01 address=0x4F) [reset=0h]
0x50 GPIO_HIZ_2 GPIO HiZ 2 GPIO_HIZ_2 (book=0x00 page=0x01 address=0x50) [reset=0h]
0x51 GPIO_HIZ_3 GPIO HiZ 3 GPIO_HIZ_3 (book=0x00 page=0x01 address=0x51) [reset=0h]
0x52 GPIO_HIZ_4 GPIO HiZ 4 GPIO_HIZ_4 (book=0x00 page=0x01 address=0x52) [reset=0h]
0x53 GPIO_HIZ_5 GPIO HiZ 5 GPIO_HIZ_5 (book=0x00 page=0x01 address=0x53) [reset=0h]
0x58 BIT_BANG_OUT1 Bit Bang Output 1 BIT_BANG_OUT1 (book=0x00 page=0x01 address=0x58) [reset=0h]
0x59 BIT_BANG_OUT2 Bit Bang Output 2 BIT_BANG_OUT2 (book=0x00 page=0x01 address=0x59) [reset=0h]
0x5A BIT_BANG_IN1 Bit Bang Input 1 BIT_BANG_IN1 (book=0x00 page=0x01 address=0x5A) [reset=0h]
0x5B BIT_BANG_IN2 Bit Bang Input 2 BIT_BANG_IN2 (book=0x00 page=0x01 address=0x5B) [reset=0h]
0x5C BIT_BANG_IN3 Bit Bang Input 3 BIT_BANG_IN3 (book=0x00 page=0x01 address=0x5C) [reset=0h]
0x60 ASIM_BUSKEEP ASIM Buskeeper ASIM_BUSKEEP (book=0x00 page=0x01 address=0x60) [reset=0h]
0x61 ASIM_MODE ASIM Mode ASIM_MODE (book=0x00 page=0x01 address=0x61) [reset=8h]
0x62 ASIM_NUM_DEV ASIM Number Devices ASIM_NUM_DEV (book=0x00 page=0x01 address=0x62) [reset=0h]
0x63 ASIM_FORMAT ASIM Format ASIM_FORMAT (book=0x00 page=0x01 address=0x63) [reset=10h]
0x64 ASIM_BDIV_CLK ASIM BDIV Clock ASIM_BDIV_CLK (book=0x00 page=0x01 address=0x64) [reset=1h]
0x65 ASIM_BDIV_RATIO ASIM BDIV Ratio ASIM_BDIV_RATIO (book=0x00 page=0x01 address=0x65) [reset=2h]
0x66 ASIM_WDIV_RATIO_1 ASIM WDIV Ratio ASIM_WDIV_RATIO_1 (book=0x00 page=0x01 address=0x66) [reset=0h]
0x67 ASIM_WDIV_RATIO_2 ASIM WDIV Ratio ASIM_WDIV_RATIO_2 (book=0x00 page=0x01 address=0x67) [reset=20h]
0x68 ASIM_BCLK ASI1 BCLK ASIM_BCLK (book=0x00 page=0x01 address=0x68) [reset=40h]
0x69 ASIM_WCLK ASI1 WCLK ASIM_WCLK (book=0x00 page=0x01 address=0x69) [reset=38h]
0x6A ASIM_DIN ASI1 DIN ASIM_DIN (book=0x00 page=0x01 address=0x6A) [reset=70h]
0x6C INT_GEN_1 Interrupt Generation 1 INT_GEN_1 (book=0x00 page=0x01 address=0x6C) [reset=0h]
0x6D INT_GEN_2 Interrupt Generation 2 INT_GEN_2 (book=0x00 page=0x01 address=0x6D) [reset=0h]
0x6E INT_GEN_3 Interrupt Generation 3 INT_GEN_3 (book=0x00 page=0x01 address=0x6E) [reset=0h]
0x6F INT_GEN_4 Interrupt Generation 4 INT_GEN_4 (book=0x00 page=0x01 address=0x6F) [reset=0h]
0x70 INT_GEN_5 Interrupt Generation 5 INT_GEN_5 (book=0x00 page=0x01 address=0x70) [reset=0h]
0x71 INT_GEN_6 Interrupt Generation 6 INT_GEN_6 (book=0x00 page=0x01 address=0x71) [reset=0h]
0x72 INT_IND_MODE Interrupt Indication Mode INT_IND_MODE (book=0x00 page=0x01 address=0x72) [reset=0h]
0x73 MAIN_CLK_PIN Main Clock Source MAIN_CLK_PIN (book=0x00 page=0x01 address=0x73) [reset=Dh]
0x74 PLL_CLK_PIN PLL Clock Source PLL_CLK_PIN (book=0x00 page=0x01 address=0x74) [reset=Dh]
0x75 CLKOUT_MUX CDIV_CLKIN Clock Source CLKOUT_MUX (book=0x00 page=0x01 address=0x75) [reset=Dh]
0x76 CLKOUT_CDIV_RATIO CLKOUT CDIV Ratio CLKOUT_CDIV_RATIO (book=0x00 page=0x01 address=0x76) [reset=1h]
0x7C I2C_MISC I2C Misc I2C_MISC (book=0x00 page=0x01 address=0x7C) [reset=0h]
0x7D DEVICE_ID Device ID DEVICE_ID (book=0x00 page=0x01 address=0x7D) [reset=12h]