SLASEG6B May 2018 – June 2020 TAS3251
The 8-bit CRC checksum used is the 0x7 polynomial (CRC-8-CCITT I.432.1; ATM HEC, ISDN HEC and cell delineation, (1 + x1 + x2 + x8). A major advantage of the CRC checksum is that it is input order sensitive.
The CRC supports all I2C transactions, excluding book and page switching. The CRC checksum is read from register 0x7E on any page of book 0x00 (B0_Page x_Reg 126). If the book isn’t Book 0, the CRC checksum is only valid on page 0x00 register 0x7E (Page 0_Reg 126). The CRC checksum can be reset by writing 0x00 00 00 00 to the same register locations where the CRC checksum is valid.