SLOS948 February 2019 TAS6424M-Q1
As a starting point, refer to the Detailed Design Procedure section for the BTL application. PBTL mode requires schematic changes in the output stage as shown in Figure 82. The other required changes include setting up the I2C registers correctly (see Table 13) and selecting which frame or channel to use on each output. Bit 6 in register 0x21 controls the frame selection.