SCPS254D January   2014  – October 2021 TCA9539-Q1

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Requirements
    7. 6.7 RESET Timing Requirements
    8. 6.8 Switching Characteristics
    9. 6.9 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 I/O Port
      2. 8.3.2 RESET Input
      3. 8.3.3 Interrupt ( INT) Output
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-On Reset
    5. 8.5 Programming
      1. 8.5.1 I2C Interface
    6. 8.6 Register Maps
      1. 8.6.1 Device Address
      2. 8.6.2 Control Register And Command Byte
      3. 8.6.3 Register Descriptions
        1. 8.6.3.1 Bus Transactions
          1. 8.6.3.1.1 Writes
          2. 8.6.3.1.2 Reads
  9. Power Supply Recommendations
    1. 9.1 Power-On Reset Requirements
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Control Register And Command Byte

Following the successful acknowledgment of the address byte, the bus controller sends a command byte shown in Table 8-3 that is stored in the control register in the TCA9539-Q1. Three bits of this data byte state the operation (read or write) and the internal register (input, output, Polarity Inversion or Configuration) that is affected. This register can be written or read through the I2C bus. The command byte is sent only during a write transmission.

When a command byte has been sent, the register pair that was addressed continues to be accessed by reads until a new command byte has been sent. Figure 8-6 shows the control register bits.

GUID-010403BA-1B58-4D89-9411-672BD0BB8840-low.gifFigure 8-6 Control Register Bits
Table 8-3 Command Byte
CONTROL REGISTER BITSCOMMAND
BYTE (HEX)
REGISTERPROTOCOLPOWER-UP
DEFAULT
B2B1B0
0000x00Input Port 0Read bytexxxx xxxx
0010x01Input Port 1Read bytexxxx xxxx
0100x02Output Port 0Read-write byte1111 1111
0110x03Output Port 1Read-write byte1111 1111
1000x04Polarity Inversion Port 0Read-write byte0000 0000
1010x05Polarity Inversion Port 1Read-write byte0000 0000
1100x06Configuration Port 0Read-write byte1111 1111
1110x07Configuration Port 1Read-write byte1111 1111