SLLSES9C February   2016  – March 2019 TCAN1042-Q1 , TCAN1042G-Q1 , TCAN1042GV-Q1 , TCAN1042H-Q1 , TCAN1042HG-Q1 , TCAN1042HGV-Q1 , TCAN1042HV-Q1 , TCAN1042V-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Functional Block Diagram
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 ESD Ratings, Specifications
    4. 7.4 Recommended Operating Conditions
    5. 7.5 Thermal Information
    6. 7.6 Power Rating
    7. 7.7 Electrical Characteristics
    8. 7.8 Switching Characteristics
    9. 7.9 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 TXD Dominant Timeout (DTO)
      2. 9.3.2 Thermal Shutdown (TSD)
      3. 9.3.3 Undervoltage Lockout
      4. 9.3.4 Unpowered Device
      5. 9.3.5 Floating Terminals
      6. 9.3.6 CAN Bus Short Circuit Current Limiting
      7. 9.3.7 Digital Inputs and Outputs
        1. 9.3.7.1 5-V VCC Only Devices (Devices without the "V" Suffix):
        2. 9.3.7.2 5 V VCC with VIO I/O Level Shifting (Devices with the "V" Suffix):
    4. 9.4 Device Functional Modes
      1. 9.4.1 CAN Bus States
      2. 9.4.2 Normal Mode
      3. 9.4.3 Standby Mode
        1. 9.4.3.1 Remote Wake Request via Wake Up Pattern (WUP) in Standby Mode
      4. 9.4.4 Driver and Receiver Function Tables
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Design Requirements
        1. 10.2.1.1 Bus Loading, Length and Number of Nodes
      2. 10.2.2 Detailed Design Procedures
        1. 10.2.2.1 CAN Termination
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Related Links
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Community Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • DRB|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

CAN Bus States

The CAN bus has two states during powered operation of the device: dominant and recessive. A dominant bus state is when the bus is driven differentially, corresponding to a logic low on the TXD and RXD terminal. A recessive bus state is when the bus is biased to VCC / 2 via the high-resistance internal input resistors RIN of the receiver, corresponding to a logic high on the TXD and RXD terminals.

TCAN1042-Q1 TCAN1042V-Q1 TCAN1042H-Q1 TCAN1042HV-Q1 TCAN1042G-Q1 TCAN1042GV-Q1 TCAN1042HG-Q1 TCAN1042HGV-Q1 Bus_Bias_1042_Versions.pngFigure 13. Bus States (Physical Bit Representation)
TCAN1042-Q1 TCAN1042V-Q1 TCAN1042H-Q1 TCAN1042HV-Q1 TCAN1042G-Q1 TCAN1042GV-Q1 TCAN1042HG-Q1 TCAN1042HGV-Q1 Bias_Unit_and_Receiver.pngFigure 14. Bias Unit (Recessive Common Mode Bias) and Receiver