SLLSFJ3C February   2021  – December 2021 TCAN1044A-Q1 , TCAN1044AV-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  ESD Ratings - IEC Specifications
    4. 7.4  Recommended Operating Conditions
    5. 7.5  Thermal Characteristics
    6. 7.6  Supply Characteristics
    7. 7.7  Dissipation Ratings
    8. 7.8  Electrical Characteristics
    9. 7.9  Switching Characteristics
    10. 7.10 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Pin Description
        1. 9.3.1.1 TXD
        2. 9.3.1.2 GND
        3. 9.3.1.3 VCC
        4. 9.3.1.4 RXD
        5. 9.3.1.5 VIO
        6. 9.3.1.6 CANH and CANL
        7. 9.3.1.7 STB (Standby)
      2. 9.3.2 CAN Bus States
      3. 9.3.3 TXD Dominant Timeout (DTO)
      4. 9.3.4 CAN Bus short-circuit current limiting
      5. 9.3.5 Thermal Shutdown (TSD)
      6. 9.3.6 Undervoltage Lockout
      7. 9.3.7 Unpowered Device
      8. 9.3.8 Floating pins
    4. 9.4 Device Functional Modes
      1. 9.4.1 Operating Modes
      2. 9.4.2 Normal Mode
      3. 9.4.3 Standby Mode
        1. 9.4.3.1 Remote Wake Request via Wake-Up Pattern (WUP) in Standby Mode
      4. 9.4.4 Driver and Receiver Function
  10. 10Application Information Disclaimer
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
        1. 10.2.1.1 CAN Termination
      2. 10.2.2 Detailed Design Procedures
        1. 10.2.2.1 Bus Loading, Length and Number of Nodes
    3. 10.3 System Examples
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Receiving Notification of Documentation Updates
    2. 13.2 Support Resources
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.3.2 CAN Bus States

The CAN bus has two logical states during operation: recessive and dominant. See Figure 9-2 and Figure 9-3.

A dominant bus state occurs when the bus is driven differentially and corresponds to a logic low on the TXD and RXD pins. A recessive bus state occurs when the bus is biased to VCC/2 via the high-resistance internal input resistors (RIN) of the receiver and corresponds to a logic high on the TXD and RXD pins.

A dominant state overwrites the recessive state during arbitration. Multiple CAN nodes may be transmitting a dominant bit at the same time during arbitration, and in this case the differential voltage of the bus is greater than the differential voltage of a single driver.

The TCAN1044A(V)-Q1 transceiver implements a low-power standby (STB) mode which enables a third bus state where the bus pins are weakly biased to ground via the high resistance internal resistors of the receiver. See Figure 9-2 and Figure 9-3.

GUID-29EA131B-057D-48D4-A83C-55221752342C-low.gifFigure 9-2 Bus States
GUID-473724B6-70CD-449E-A73C-BC94F6DB1DD1-low.gif
A - Normal Mode B - Standby Mode
Figure 9-3 Simplified Recessive Common Mode Bias Unit and Receiver